mc68hc908gr8b Freescale Semiconductor, Inc, mc68hc908gr8b Datasheet - Page 223

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mc68hc908gr8b

Manufacturer Part Number
mc68hc908gr8b
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Enter monitor mode with pin configuration shown in
RST latches monitor mode. Once monitor mode is latched, the levels on the port pins except PTA0 can
change.
Once out of reset, the MCU waits for the host to send eight security bytes (see
security bytes, the MCU sends a break signal (10 consecutive 0s) to the host, indicating that it is ready to
receive a command.
18.3.1.1 Normal Monitor Mode
When monitor mode is entered with V
long as V
This condition states that as long as V
V
then the COP will be disabled. In the latter situation, after V
removed from the IRQ pin in the interest of freeing the IRQ for normal functionality in monitor mode.
18.3.1.2 Forced Monitor Mode
If entering monitor mode without high voltage on IRQ, all port B pin requirements and conditions are not
in effect. This is to reduce circuit requirements when performing in-circuit programming.
An external oscillator of 9.8304 MHz is required for a baud rate of 9600, as the internal bus frequency is
automatically set to the external frequency divided by four.
When the forced monitor mode is entered the COP is always disabled regardless of the state of IRQ or
RST.
18.3.1.3 Monitor Vectors
In monitor mode, the MCU uses different vectors for reset, SWI (software interrupt), and break interrupt
than those for user mode. The alternate vectors are in the $FE page instead of the $FF page and allow
code execution from the internal monitor firmware instead of user code.
Table 18-2
Freescale Semiconductor
TST
is applied to RST after the initial reset to get into monitor mode (when V
TST
summarizes the differences between user mode and monitor mode.
User
Monitor
Modes
is applied to either IRQ or RST.
If the reset vector is blank and monitor mode is entered, the chip will see an
additional reset cycle after the initial power-on reset (POR). Once the reset
vector has been programmed, the traditional method of applying a voltage,
V
TST
, to IRQ must be used to enter monitor mode.
Vector High
$FEFE
$FFFE
Reset
Vector Low
$FFFF
$FEFF
Reset
MC68HC908GR8B Data Sheet, Rev. 3.0
Table 18-2. Mode Differences
TST
TST
on IRQ, the computer operating properly (COP) is disabled as
is maintained on the IRQ pin after entering monitor mode, or if
Vector High
$FFFC
$FEFC
Break
NOTE
Table 18-1
Functions
Vector Low
$FEFD
TST
$FFFD
Break
with a power-on reset. The rising edge of
is applied to the RST pin, V
Vector High
$FFFC
$FEFC
SWI
TST
18.3.2
was applied to IRQ),
Vector Low
Monitor Module (MON)
$FEFD
$FFFD
Security). After the
SWI
TST
can be
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