mc68hc908gr8b Freescale Semiconductor, Inc, mc68hc908gr8b Datasheet - Page 152

• Manufacturer Part Number: mc68hc908gr8b
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Serial Communications Interface (SCI) Module
13.8.6 SCI Data Register
The SCI data register (SCDR) is the buffer between the internal data bus and the receive and transmit
shift registers. Reset has no effect on data in the SCI data register.
R7/T7–R0/T0 — Receive/Transmit Data Bits
13.8.7 SCI Baud Rate Register
The baud rate register (SCBR) selects the baud rate for both the receiver and the transmitter.
SCP1 and SCP0 — SCI Baud Rate Prescaler Bits
152
Reading the SCDR accesses the read-only received data bits, R7:R0. Writing to the SCDR writes the
data to be transmitted, T7:T0.
Reset has no effect on the SCDR.
These read/write bits select the baud rate prescaler divisor as shown in
and SCP0.
Address:
Address:
Do not use read/modify/write instructions on the SCI data register.
Reset:
Reset:
Read:
Read:
Write:
Write:
$0018
$0019
Bit 7
Bit 7
R7
T7
0
SCP1 and SCP0
Figure 13-17. SCI Baud Rate Register (SCBR)
= Unimplemented
Figure 13-16. SCI Data Register (SCDR)
00
01
10
11
Table 13-6. SCI Baud Rate Prescaling
R6
T6
6
6
0
MC68HC908GR8B Data Sheet, Rev. 3.0
SCP1
R5
T5
5
5
0
NOTE
Unaffected by reset
SCP0
R4
T4
4
4
0
Prescaler Divisor (PD)
R3
T3
R
R
3
3
0
13
1
3
4
= Reserved
SCR2
R2
T2
2
2
0
Table
SCR1
R1
T1
1
1
0
13-6. Reset clears SCP1
Freescale Semiconductor
SCR0
Bit 0
Bit 0
R0
T0
0