m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 65

• Manufacturer Part Number: m5m51016btp
• Description: Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
• Manufacturer: Renesas Electronics Corporation.

M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Table 2.4.2. Example of baud rate setting
Table 2.4.3. Error detection
F r a m i n g e r r o r
P a r i t y e r r o r
E r r o r - s u m f l a g
Overrun error
Baud rate
(2) Transfer rate
(3) An error detection
(bps)
Type of error
The divide-by-16 frequency, resulting from division in the bit rate generator (BRG), becomes the trans-
fer rate. The count source for the transfer rate register can be selected from f
from the CLK pin. Clocks f
respectively.
In UART mode, detected errors are shown in Table 2.4.3.
14400
19200
28800
31250
1200
2400
4800
9600
600
count source
page 56 of 354
BRG's
f
f
f
f
f
f
f
f
f
• This error occurs when the
• The contents of the UARTi
• The UARTi receive interrupt
• This error occurs when the
• With parity enabled, this error
• This flag turns on when any
8
8
8
1
1
1
1
1
1
serial interface starts receiving
the next data item before
reading the contents of the
UARTi receive buffer register
and receives the bit preceding
the final stop bit of the next
data item.
receive buffer register are
undefined.
request bit does not go to “1”.
stop bit falls short of the set
number of stop bits.
occurs when the total number
of 1's in character bits and the
parity bit is different from the
specified number.
error (overrun, framing, or
parity) is detected.
Description
1
BRG's set value : n
, f
8
, f
207 (CF
207 (CF
103 (67
103 (67
51 (33
68 (44
51 (33
34 (22
33 (21
32
System clock : 16MHz
are derived by dividing the CPU’s main clock by 1, 8, and 32
16
16
16
16
16
16
16
16
16
)
)
)
)
)
)
)
)
)
Actual time (bps)
When the flag turns on
T h e e r r o r i s d e t e c t e d
w h e n d a t a i s
t r a n s f e r r e d f r o m t h e
U A R T i r e c e i v e r e g i s t e r
t o t h e U A R T i r e c e i v e
b u f f e r r e g i s t e r .
14493
19231
28571
31250
1202
2404
4808
9615
601
BRG's set value : n
95 (5F
47 (2F
23 (17
95 (5F
47 (2F
31 (1F
23 (17
15 (F
• S e t t h e s e r i a l I / O m o d e s e l e c t
• S e t t h e r e c e i v e e n a b l e b i t t o
• Set the serial I/O mode select
• Set the receive enable bit to
• Read the lower-order byte of
• W h e n a l l e r r o r ( o v e r r u n ,
System clock : 7.3728MHz
b i t s t o “ 0 0 0
“ 0 ” .
bits to ”000
“0”.
the UARTi receive buffer
register.
f r a m i n g , a n d p a r i t y ) a r e
r e m o v e d , t h e f l a g i s c l e a r e d .
16
16
16
16
16
16
16
16
How to clear the flag
)
)
)
)
)
)
)
)
1
, f
8
, f
2
2
” .
”.
32
Actual time (bps)
, and the input
14400
19200
28800
1200
2400
4800
9600
600
2. UART