m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 81

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m5m51016btp

Manufacturer Part Number
m5m51016btp
Description
Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
2.4.4 Serial I/O Precautions (UART Mode)
Description
When the level of the CLKi and CTSi pins goes to “H” (Note 1), if the UiMR register is set to
any of the following, the UiERE bit in the UiC1 register is set to “1” (parity error signal output
enabled). When the PRYE bit in the UiMR register is set to “1” while the UiERE bit is “1”
(parity error signal output enabled), the TXDi pin outputs “L” level if a parity error occurs
while receiving data. To prevent this, set the UiERE bit after setting the UiMR register.
• Change the setting of bits SMD2 to SMD0 from “000
• Change the setting of bits SMD2 to SMD0 from “001
• Change the setting of bits SMD2 to SMD0 from “001
• Change the setting of bits SMD2 to SMD0 from “001
• Change the setting of bits SMD2 to SMD0 from “010
Note 1: If the pins are not used as CLKi or CTSi, these conditions apply when the pin level
(UART mode transfer data length 8 bits).
to “100
to “101
to “110
transfer data length 8 bits).
page 72 of 354
goes to “H”.
2
2
2
” (UART mode transfer data length 7 bits).
” (UART mode transfer data length 8 bits).
” (UART mode transfer data length 9 bits).
2
2
2
” (clock synchronous serial I/O mode)
” (clock synchronous serial I/O mode)
” (clock synchronous serial I/O mode)
2
” (I
2
2
” (serial I/O disabled) to “101
C mode) to “101
2
” (UART mode
2. UART
2

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