ata5724p3c-tkqy ATMEL Corporation, ata5724p3c-tkqy Datasheet - Page 11

• Manufacturer Part Number: ata5724p3c-tkqy
• Description: Uhf Ask/fsk Receiver
• Manufacturer: ATMEL Corporation

8. Polling Mode
8.1
9248A–RKE–09/11
Sleep Mode
The clock cycle of some function blocks depends on the selected baud-rate range
(BR_Range), which is defined in the OPMODE register. This clock cycle T
following formulas:
BR_Range =
According to
three different modes. In sleep mode the signal processing circuitry is disabled for the time
period T
signal processing circuits are enabled and settled. In the following bit-check mode, the incom-
ing data stream is analyzed bit-by-bit and compared with a valid transmitter signal. If no valid
signal is present, the receiver is set back to sleep mode after the period T
varies according to each check as it is a statistical process. An average value for T
given in the electrical characteristics. During T
I
consumption in polling mode is dependent on the duty cycle of the active mode and can be
calculated as:
During T
reception of a transmitted command, the transmitter must start the telegram with an adequate
preburst. The required length of the preburst depends on the polling parameters T
T
depends on the actual bit rate and the number of bits (N
The following formula indicates how to calculate the preburst length.
T
The length of period T
extension factor X
is calculated to be:
T
The maximum value of T
2ms in that case. The sleep time can be extended to almost half a second by setting X
to 8. X
Setting the configuration word Sleep to its maximal value puts the receiver into a permanent
sleep mode. The receiver remains in this state until another value for Sleep is programmed
into the OPMODE register. This is particularily useful when several devices share a single
data line. (It can also be used for microcontroller polling: using pin POLLING/_ON, the receiver
can be switched on and off.)
I
S
Spoll
Bit-check
Preburst
Sleep
= I
Son
=
= Sleep
Sleep
. The condition of the receiver is indicated on pin IC_ACTIVE. The average current
I
--------------------------------------------------------------------------------------------------------------- -
Sleep
and the start-up time of a connected microcontroller, T
Sleep
Soff
T
can be set to 8 by bit X
Sleep
Figure 8-1 on page
while consuming low current of I
and T
T
+ T
T
X
Sleep
Sleep
Atmel ATA5723C/ATA5724C/ATA5728C
Sleep
Sleep
Startup
Startup
+
+
(according to
Sleep
I
, the receiver is not sensitive to a transmitter signal. To guarantee the
Son
T
+ T
1024
Sleep
Startup
is defined by the 5-bit word Sleep of the OPMODE register, the
Bit-check
is about 60ms if X
BR_Range0:
BR_Range1:
BR_Range2:
BR_Range3:
T
+
12, the receiver stays in polling mode in a continuous cycle of
Startup
T
SleepStd
T
Clk
+ T
Bit-check
Table 11-8 on page
Start_microcontroller
+
T
to “1”.
Bit-check
S
Startup
= I
Sleep
Soff
and T
is set to 1. The time resolution is about
. During the start-up period, T
T
T
T
T
Bit-check
XClk
XClk
XClk
XClk
27), and the basic clock cycle T
Bit-check
= 8
= 4
= 2
= 1
) to be tested.
Start_microcontroller
, the current consumption is
T
T
T
T
Clk
Clk
Clk
Clk
XClk
Bit-check
is defined by the
. Thus, T
. This period
Sleep
Startup
Bitcheck
, T
Bit-check
Startup
Clk
Sleep
, all
. It
11
is
,