71m6534h-igt Maxim Integrated Products, Inc., 71m6534h-igt Datasheet - Page 27

• Manufacturer Part Number: 71m6534h-igt
• Description: Energy Meter Ic
• Manufacturer: Maxim Integrated Products, Inc.

FDS_6533_6534_004
transmission by the associated UART. Received data are available by reading from the receive buffer.
Both UARTs can simultaneously transmit and receive data.
WDCON[7] selects whether timer 1 or the internal baud rate generator is used. All UART transfers are
programmable for parity enable, parity, 2 stop bits/1 stop bit and XON/XOFF options for variable commu-
nication baud rates from 300 to 38400 bps.
shows the selectable UART operation modes.
S0REL and S1REL are 10-bit values derived by combining bits from the respective timer reload registers.
SMOD is the SMOD bit in the SFR PCON register. TH1 is the high byte of timer 1.
The feature of receiving 9 bits (Mode 3 for UART0, Mode A for UART1) can be used as handshake sig-
nals for inter-processor communication in multi-processor systems. In this case, the slave processors
have bit SM20 (S0CON[5]) for UART0, or SM21 (S1CON[5] for UART1, set to 1. When the master proces-
sor outputs the slave’s address, it sets the 9
slaves. The slave processors compare the received byte with their address. If there is a match, the ad-
dressed slave will clear SM20 or SM21 and receive the rest of the message. The rest of the slave’s will
ignore the message. After addressing the slave, the host outputs the rest of the message with the 9
set to 0, so no additional serial port receive interrupts will be generated.
UART Control Registers:
The functions of UART0 and UART1 depend on the setting of the Serial Port Control Registers S0CON
and S1CON shown in
The UARTs require software to clear the interrupt bits. It is recommended to use bit manipulation instruc-
tions rather than byte instructions when using UART1 in full duplex mode. For example, the CLR TI0 in-
struction should be used instead of ANL #0FDH,S0CON. Further measures in code involve reducing and
combining the write operations to S1CON and reducing the time between the read and write operations on
v1.1
Mode 0
Mode 1
Mode 2
Mode 3
UART0
UART1
control bits TB80 (S0CON[3]) and TB81 (S1CON[3]) in the S0CON and S1CON SFRs for transmit
and RB81 (S1CON[2]) for receive operations.
Parity of serial data is available through the P flag of the accumulator. 7-bit serial modes with
parity, such as those used by the FLAG protocol, can be simulated by setting and reading bit 7 of
8-bit output data. 7-bit serial modes without parity can be simulated by setting bit 7 to a constant
1. 8-bit serial modes with parity can be simulated by setting and reading the 9
N/A
Start bit, 8 data bits, stop bit, variable
baud rate (internal baud rate generator
or timer 1)
Start bit, 8 data bits, parity, stop bit,
fixed baud rate 1/32 or 1/64 of f
Start bit, 8 data bits, parity, stop bit, va-
riable baud rate (internal baud rate ge-
nerator or timer 1)
Table 17
2
N/A
smod
© 2007-2009 TERIDIAN Semiconductor Corporation
* f
and
CKMPU
UART 0
(WDCON[7] = 0)
Using Timer 1
Table 18,
Table 15: Baud Rate Generation
/ (384 * (256-TH1))
Table 16: UART Modes
th
Table 15
respectively, and the PCON register shown in
bit to 1, causing a serial port receive interrupt in all the
CKMPU
shows how the baud rates are calculated.
Start bit, 8 data bits, parity, stop bit, variable
baud rate (internal baud rate generator)
Start bit, 8 data bits, stop bit, variable baud
rate (internal baud rate generator)
N/A
N/A
2
f
CKMPU
smod
Using Internal Baud Rate Generator
* f
/(32 * (2
CKMPU
/(64 * (2
(WDCON[7] = 1)
10
71M6533/71M6534 Data Sheet
-S1REL))
UART 1
10
-S0REL))
th
bit, using the
Table
Table 16
19.
th
bit
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