71m6534h-igt Maxim Integrated Products, Inc., 71m6534h-igt Datasheet - Page 64

• Manufacturer Part Number: 71m6534h-igt
• Description: Energy Meter Ic
• Manufacturer: Maxim Integrated Products, Inc.

71M6533/71M6534 Data Sheet
readies the timer to start when the processor writes to the SLEEP or LCD_ONLY registers. The timer is
reset and disarmed whenever the processor is awake. Thus, if it is desired to wake the MPU periodically
(every 5 seconds, for example) the timer must be rearmed every time the part returns from SLEEP or
LCD mode.
2.6 Data Flow
The data flow between the Compute Engine (CE) and the MPU is shown in
cation, the 32-bit CE sequentially processes the samples from the voltage inputs on pins IA, VA, IB, and
VB, performing calculations to measure active power (Wh), reactive power (VARh), A
quadrant metering. These measurements are then accessed by the MPU, processed further and output
using the peripheral devices available to the MPU.
2.7 CE/MPU Communication
Figure 29
MPU via shared registers in the I/O RAM and in RAM.
The CE outputs two interrupt signals to the MPU: CE_BUSY and XFER_BUSY, which are connected to
the MPU interrupt service inputs as external interrupts. CE_BUSY indicates that the CE is actively pro-
cessing data. This signal will occur once every multiplexer cycle. XFER_BUSY indicates that the CE is
updating data to the output region of the RAM. This will occur whenever the CE has finished generating a
sum by completing an accumulation interval determined by SUM_CYCLES * PRE_SAMPS samples. Inter-
rupts to the MPU occur on the falling edges of the XFER_BUSY and CE_BUSY signals.
Refer to Section
MPU firmware.
64
shows the functional relationships between the CE and the MPU. The CE is controlled by the
Mux Control
ADC
4.3 CE Interface Description
Samples
SAMPLES
© 2007-2009 TERIDIAN Semiconductor Corporation
(DIO7)
I/O RAM (Configuration RAM)
VAR
CE
Figure 29: MPU/CE Communication
Pulses
Processor
I/O RAM (Configuration RAM)
CE
Pre -
Figure 28: MPU/CE Data Flow
W (DIO6)
PULSES
for additional information on setting up the device using the
IRQ
Data
SAG CONTROL
INTERRUPTS
XFER BUSY
EXT PULSE
APULSEW
APULSER
CE BUSY
DATA
Figure 28
Processor
MPU
Post -
illustrates the CE/MPU data flow.
MPU
Processed
Metering
Data
Figure
DISPLAY (Memory
mapped LCD
segments)
SERIAL
(UART0/1)
EEPROM
(I
DIO
28. In a typical appli-
2
FDS_6533_6534_004
C)
2
h, and V
2
h for four-
v1.1