le79128 Zarlink Semiconductor, le79128 Datasheet - Page 47

• Manufacturer Part Number: le79128
• Description: Next Generation Voiceedge™ Control Processor Next Generation Carrier Chipset Ngcc
• Manufacturer: Zarlink Semiconductor

TROUBLESHOOTING AT INITIAL START-UP
Verify that the power supplies and the Configuration pins are appropriately set. Configuration pins must be set before releasing
the VCP device from reset.
Next perform the following steps to check that the VCP can be read and written through the HBI.
1. Probe the PWAIT pin. With reset inactive, perform a write of 0x04 to the Configure Interface register (CMD 0xFD04). This
2. With reset inactive, perform a read of the CMD register. This should return 0x0002 (the 2 bit is the interrupt pin status—it
3. Write to the Page register (CMD 0xFEzz - zz being any page number 0 - 0xFF). This write should be reflected in a subsequent
4. A read of the PCLK-Selection register (CMD 0x8801, followed by two 16-bit reads of the data register) with no PCLK or FS
If the four steps above were completed successfully, the VCP device is now functional.
Finally, run the quickstart application that is provided in the package and boot-load the API image. This provides verification of
the VCP firmware image download and execution, the MPI to SLAC interface, and the integrity of the PCM highways and the
voice path. It also verifies basic call control, usage of profiles, DTMF decoding, and line testing. The boot-load is supplied as a
binary firmware load to the VCP. It is to be boot-loaded into the VCP along with some C host code to boot-load and control the
image.
should result in the PWAIT pin going High; writing 0x06 (CMD 0xFD06) will make PWAIT go Low. This verifies the basic HAL
function - VpHalHbiCmd().
should be High, inactive). To read the CMD register in 8-bit mode, perform two back to back 8-bit reads of the CMD register
location. For this step, no HAL function needed, simple address read.
read of the CMD register above. A CMD of 0xFEAA should result in a read from the CMD register of 0xAA02. This is writing
the Page register which gets reflected in a read of the CMD register (again, the read is two 8-bit reads of the CMD register
location—the same location read twice).
will result in a value of 0x92FB 0x92FB. If both PCLK and FS are present, then the value read will be the exact PCLK de-
tected by the device (see page 21 or 22 for returned value). This step reads two words using HAL function - VpHalHbiRead().
The command to read the PCLK registers (A and B) is 0x8801 to read two words. Word 0 is PCLKB and will return the exact
PCLK detected by the VCP or 0x92FB if PCLKB is not present. Word 1 is PCLKA and will return the exact PCLK detected
by the VCP or 0x92FB if PCLKA is not present.
Microsemi Corporation - CMPG
Le79128
47
Preliminary Data Sheet