le79128 Zarlink Semiconductor, le79128 Datasheet - Page 6

• Manufacturer Part Number: le79128
• Description: Next Generation Voiceedge™ Control Processor Next Generation Carrier Chipset Ngcc
• Manufacturer: Zarlink Semiconductor

PIN DESCRIPTIONS
Refer to the Next Generation Carrier Chipset Hardware Design Guide (Document ID 126583) for an Application Circuit and Parts
List of external components.
All signals are CMOS levels unless otherwise stated.
CONF
CONF
CONF
PCS/SS
PRD (PRD/
WR or SI)
PWR (PDS
or SCK)
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PWAIT
PADDR
INT
(Alternate)
Pin Name
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
(SO)
2
1
0
Table 2. Le79128 VCP Device Pin Description (Host Interface Pins)
TQFP
Pin #
91
90
86
28
29
30
31
32
33
34
35
37
42
44
46
50
51
53
55
59
62
63
23
27
22
LBGA
Pin #
C12
D12
E12
M1
M2
M3
M4
M5
M6
H2
K3
K1
K2
K4
K5
K6
K7
L1
L2
L3
L4
L5
L6
J3
J2
Input
Input
Input
Input
Input
Output
Output
Input
Input/
Output
Input/
Output
Input/
Output
Input
Type
Z/Pull-down
(Parallel)
Z (Serial)
Z/Keeper
Z/Keeper
Z/Pull-up
Reset
Z
Z
Z
Z
Z
Z
Z
Z
Microsemi Corporation - CMPG
1
VCP configuration pins that determine serial or parallel modes (8-bit, 16-bit,
separate read and write strobes, data strobe and combined read/write
strobe). See Table 8 for configuration summary.
PCS: Parallel interface: active-low chip select.
SS: Serial interface: active-low slave select.
PRD: Parallel Separate Rd/Wr strobe: active-low read strobe.
PRD/WR: Parallel Combined Rd/Wr strobe: active-high read control/active-
low write control.
SI: Serial interface: data input.
PWR: Parallel Separate Rd/Wr strobe: active-low write strobe
PDS: Parallel Combined Rd/Wr strobe: active-low data strobe.
SCK: Serial interface: data clock.
16-bit parallel interface: bi-directional data bits 15-8.
Serial interface: reserved.
PD
SO: Serial interface: data output.
Parallel interface: bi-directional data bits 6 through 0.
Serial interface: reserved.
Parallel interface: programmable active-low or active-high signal to extend
the current access cycle. PWAIT should be connected to a resistor pulled to
the inactive state. If unused, let pin float.
Serial interface: reserved.
Parallel interface: signal to indicate the start of a command sequence.
Serial interface: reserved.
Host Interrupt indicator (active low).
Le79128
7
: Parallel interface: bi-directional data bit 7.
6
Description
Preliminary Data Sheet