txc-03456 TranSwitch Corporation, txc-03456 Datasheet - Page 24

• Manufacturer Part Number: txc-03456
• Description: Device Level Mapper
• Manufacturer: TranSwitch Corporation

Add clock period
Add clock duty cycle, t
AC1J1 set-up time to ACLK
AC1J1 hold time after ACLK
ASPE set-up time to ACLK
ASPE hold time after ACLK
ADD low output delay from ACLK
Data output delay from ACLK
APAR output delay from ACLK
(OUTPUT)
(OUTPUT)
AD7-AD0
(INPUT)
(INPUT)
(INPUT)
AC1J1
ASPE
ACLK
ADD
Note: The relationship between J1 and the SPE signals is shown for illustration purposes only, and will
be a function of the pointer offset. The APAR signal is not shown.
Parameter
t
SU(1)
PWH
/t
C1(1)
CYC
Figure 5. Add Bus Interface Timing (Add Bus)
t
H(1)
t
(not shown)
H(2)
Symbol
t
t
t
SU(1)
t
SU(2)
t
t
t
t
CYC
H(1)
H(2)
D(1)
D(2)
D(3)
t
t
D(2)
D(1)
t
PWH
DATA SHEET
- 24 -
t
SU(2)
t
CYC
DATA
10.0
10.0
Min
3.0
7.0
5.0
7.5
7.0
40
DATA
51.44
DATA
J1
Typ
50
J1 or Stuff
Max
33.0
28.0
37.0
60
DATA
Ed. 1A, January 2000
TXC-03456
TXC-03456-MB
DATA
Unit
ns
ns
ns
ns
ns
ns
ns
ns
%
L4M