txc-03456 TranSwitch Corporation, txc-03456 Datasheet - Page 69

• Manufacturer Part Number: txc-03456
• Description: Device Level Mapper
• Manufacturer: TranSwitch Corporation

Address
11
Bit
7
6
5
4
FEBEEN
Symbol
PSLEN
RDIEN
TRDI
Path Signal Label Alarm Enable: A 1 enables a 140 Mbit/s receive line
AIS, and path RDI to be generated and sent when a C2 mismatch alarm
(PLSERR) or unequipped (C2EQ0) alarm occurs.
Far End Receive Failure Enable: A 1 enables the internal alarms to
determine the state of the transmitted RDI bit, while a 0 disables the
internal alarms from controlling the state of the RDI bit. When written
with a 0, the microprocessor must write the state of the RDI bit by writing
a 1 or 0 to control bit TRDI or bit 3 in the G1 POH byte register location
7AH. The following table is a summary of the various conditions that
generates an RDI.
- External G1 byte, when EXG1 is a 1
- RDIEN is a 1 and RING and EXG1 are 0:
- RING and RDIEN are a 1, and EXG1 is 0:
- RDIEN and EXG1 are 0:
Transmit RDI: A 1 generates an RDI (Bit 5 in the transmit G1 byte is set
to 1) when control bit RDIEN bit is 0. This bit is orred with the micropro-
cessor-written RAM G1 value for RDI (bit 3) in location 6AH.
Far End Block Error Enable: A 1 enables the received B3 value to gen-
erate the transmitted FEBE count. A 0 enables a microprocessor-written
value (bits 7 - 4 in register location 6AH) to be transmitted as the FEBE
count. The FEBE count is sent under the following conditions:
- Via external G1 byte, when EXG1 is a 1.
- Microprocessor-written value in bits 7-4 in 6AH,
- Received B3 BIP-8 errors, when FEBEEN is a 1,
- Received B3 BIP-8 errors via Alarm Indication Port,
when FEBEEN is a 0.
and RING and EXG1 are 0.
when FEBEEN and RING are 1, and EXG1 is 0.
- DBLOC alarm=1 and DROPT pin is low
- Low on EXAIS (pin 17)
- E1 byte AIS indication, when EAPE is a 0
- High on ISTAT (pin 37), when EAPE is a 1
- High on PAIS (pin 38), when EAPE is a 1
- High on STAI (pin 39), when XRDIEN is a 1
- Drop bus loss of J1 alarm (DBLOJ1) when PTEN (pin 2) is low
- Path signal label mismatch (PSLERR), when PSLEN is a 1
- Unequipped status (C2EQ0), when PSLEN is a 1
- J1 loss of lock (J1LOL), when J1LEN is a 1
- J1 trace message mismatch (J1TIM), when J1TEN is a 1
- Loss of pointer (RLOP), when PTEN (pin 2) is high
- Path AIS (RPAIS), when PTEN (pin 2) is high.
- RDI status via Alarm Indication Port (no AIPLOC alarm).
- Bit 3 in 6AH is a 1 (transmit G1 byte in RAM).
- TRDI is a 1.
DATA SHEET
- 69 -
Description
Ed. 1A, January 2000
TXC-03456
TXC-03456-MB
L4M