DSP56002RC40 Motorola Inc, DSP56002RC40 Datasheet - Page 33
![no-image](/images/no-image-200.jpg)
DSP56002RC40
Manufacturer Part Number
DSP56002RC40
Description
24-BIT DIGITAL SIGNAL PROCESSOR
Manufacturer
Motorola Inc
Datasheet
1.DSP56002RC40.pdf
(110 pages)
- Current page: 33 of 110
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MOTOROLA
Note:
Num
1
2
3
4
Frequency of Operation
(EXTAL Pin)
Clock Input High
• With PLL disabled
• With PLL enabled
Clock Input Low
• With PLL disabled
• With PLL enabled
Clock Cycle Time
• With PLL disabled
• With PLL enabled
Instruction Cycle Time =
• With PLL disabled
• With PLL enabled
External Clock Input High and External Clock Input Low are measured at 50% of the input
transition.
NOTE: The midpoint is V
EXTAL
(46.7% – 53.3% duty cycle)
(42.5% – 57.5% duty cycle)
(46.7% – 53.3% duty cycle)
(42.5% – 57.5% duty cycle)
I
CYC
Characteristics
= 2T
C
ET
1
H
Figure 2-3 External Clock Timing
ILC
Table 2-5 Clock Operation
ET
+ 0.5 (V
3
DSP56002/D, Rev. 3
C
Symbol
I
ET
ET
ET
CYC
E
f
H
IHC
C
L
ET
2
L
– V
Min
11.7
10.5 235.5 s
11.7
10.5 235.5 s
25
25
50
50
0
ILC
40 MHz
4
).
409.6 s
819.2 s
Max
40
15.15
15.15 409.6 s
Min
7.09
6.36 235.5 s
7.09
6.36 235.5 s
30.3
30.3 819.2 s
0
66 MHz
Max
External Clock (EXTAL Pin)
66
Midpoint
V
ILC
Min
12.5
12.5 409.6 s
5.8
5.3
5.8
5.3
25
25
0
80 MHz
235.5 s
235.5 s
819.2 s
Specifications
V
Max
IHC
80
AA0360
MHz
Unit
ns
ns
ns
ns
2-7
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