ADSP-BF561_06 AD [Analog Devices], ADSP-BF561_06 Datasheet - Page 2

• Manufacturer Part Number: ADSP-BF561_06
• Description: Blackfin Embedded Symmetric Multiprocessor
• Manufacturer: AD [Analog Devices]

ADSP-BF561
TABLE OF CONTENTS
General Description ................................................. 4
Pin Descriptions .................................................... 17
Specifications ........................................................ 20
Portable Low Power Architecture ............................. 4
Blackfin Processor Core .......................................... 4
Memory Architecture ............................................ 5
DMA Controllers .................................................. 9
Watchdog Timer .................................................. 9
Timers ............................................................. 10
Serial Ports (SPORTs) .......................................... 10
Serial Peripheral Interface (SPI) Port ....................... 10
UART Port ........................................................ 10
Programmable Flags (PFx) .................................... 11
Parallel Peripheral Interface ................................... 11
Dynamic Power Management ................................ 12
Voltage Regulation .............................................. 13
Clock Signals ..................................................... 13
Booting Modes ................................................... 14
Instruction Set Description ................................... 14
Development Tools ............................................. 15
Designing an Emulator-Compatible
Related Documents ............................................. 16
Recommended Operating Conditions ...................... 20
Electrical Characteristics ....................................... 20
Absolute Maximum Ratings .................................. 21
Package Information ........................................... 21
ESD Sensitivity ................................................... 21
Timing Specifications .......................................... 22
Processor Board (Target) ................................... 16
Clock and Reset Timing .................................... 23
Asynchronous Memory Read Cycle Timing ........... 24
Asynchronous Memory Write Cycle Timing .......... 25
SDRAM Interface Timing .................................. 26
External Port Bus Request and Grant Cycle Timing .. 27
Parallel Peripheral Interface Timing ..................... 28
Serial Ports ..................................................... 31
Serial Peripheral Interface (SPI) Port—
Serial Peripheral Interface (SPI) Port—
Universal Asynchronous Receiver Transmitter (UART)
Master Timing ............................................. 35
Slave Timing ............................................... 36
Port—Receive and Transmit Timing ................. 37
Rev. A | Page 2 of 60 | May 2006
256-Ball MBGA Pinout ............................................ 46
297-Ball PBGA Pinout ............................................. 51
Outline Dimensions ................................................ 56
Ordering Guide ..................................................... 58
Output Drive Currents ......................................... 41
Power Dissipation ............................................... 42
Test Conditions .................................................. 43
Environmental Conditions .................................... 45
Programmable Flags Cycle Timing ....................... 38
Timer Cycle Timing .......................................... 39
JTAG Test and Emulation Port Timing .................. 40