M24LR64-R-DW6T/2 STMICROELECTRONICS [STMicroelectronics], M24LR64-R-DW6T/2 Datasheet - Page 30

• Manufacturer Part Number: M24LR64-R-DW6T/2
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

I
5.5
30/126
2
C device operation
Memory addressing
To start communication between the bus master and the slave device, the bus master must
initiate a Start condition. Following this, the bus master sends the device select code, shown
in
The device select code consists of a 4-bit device type identifier, and a 3-bit Chip Enable
“Address” (E2, E1, E0). To address the memory array, the 4-bit device type identifier is
1010b.
Up to four memory devices can be connected on a single I
unique 2-bit code on the Chip Enable (E0, E1) inputs. When the device select code is
received, the device only responds if the Chip Enable Address is the same as the value on
the Chip Enable (E0, E1) inputs.
The 8
If a match occurs on the device select code, the corresponding device gives an
acknowledgment on Serial Data (SDA) during the 9
the device select code, it deselects itself from the bus, and goes into Standby mode.
Table 15.
Figure 10. Write mode sequences with I2C_Write_Lock bit = 1 (data write inhibited)
Current Address Read
Random Address Read
Sequential Read
Byte Write
Page Write
Table 2
th
Byte Write
Page Write
Page Write
(cont'd)
bit is the Read/Write bit (RW). This bit is set to 1 for Read and 0 for Write operations.
Mode
(on Serial Data (SDA), most significant bit first).
Operating modes
NO ACK
Dev select
Dev select
RW bit
1
0
1
1
0
0
Data in N
Doc ID 15170 Rev 8
R/W
R/W
ACK
ACK
NO ACK
Byte address
Byte address
 4 bytes
Bytes
 1
1
1
1
ACK
ACK
Byte address
Byte address
Start, device select, RW = 1
Start, device select, RW = 0, Address
reStart, device select, RW = 1
Similar to Current or Random Address Read
Start, device select, RW = 0
Start, device select, RW = 0
th
bit time. If the device does not match
2
ACK
ACK
C bus. Each one is given a
Initial sequence
Data in 1
Data in
NO ACK
NO ACK
Data in 2
M24LR64-R
AI15115