SAF-C161S-L25M Infineon Technologies AG, SAF-C161S-L25M Datasheet - Page 14

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SAF-C161S-L25M

Manufacturer Part Number
SAF-C161S-L25M
Description
16-Bit Single-Chip Microcontroller
Manufacturer
Infineon Technologies AG
Datasheet

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3
The architecture of the C161S combines advantages of both RISC and CISC processors
and of advanced peripheral subsystems in a very well-balanced way. In addition the on-
chip memory blocks allow the design of compact systems with maximum performance.
Figure 3
high bandwidth internal bus structure of the C161S.
Note: All time specifications refer to a CPU clock of 20 MHz
Figure 3
The program memory, the internal RAM (IRAM) and the set of generic peripherals are
connected to the CPU via separate buses. A fourth bus, the XBUS, connects external
resources as well as additional on-chip resources, the X-Peripherals (see
Data Sheet
4
6
(see definition in the AC Characteristics section).
ProgMem
Internal
gives an overview of the different on-chip components and of the advanced,
ROM
Area
Functional Description
XBUS Control
External Bus
Port 0
Block Diagram
Control
16
EBC
Instr. / Data
16
16
Port 1
32
16
External Instr. / Data
(USART)
ASC0
BRGen
Interrupt Controller 16-Level
Port 3
C166-Core
CPU
BRGen
SSC
(SPI)
10
12
PEC
Priority
GPT
T2
T3
T4
T5
T6
Interrupt Bus
Peripheral Data Bus
Data
Data
16
Functional Description
Port 5
2
16
16
RTC
Osc / PLL
2 Kbytes
IRAM
Internal
MCB04323_1S.vsd
RAM
Figure
V1.0, 2003-11
WDT
C161S
3).
XTAL
7

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