XE8000EV120 Semtech, XE8000EV120 Datasheet - Page 21

• Manufacturer Part Number: XE8000EV120
• Description: BOARD EVAL FOR SX8722I070TRLF
• Manufacturer: Semtech
• Series: ZoomingADC™r

Specifications of XE8000EV120

• Number Of Adc's: 1
• Number Of Bits: 16
• Data Interface: I²C
• Inputs Per Adc: 7 Single or 4 Differential
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Utilized Ic / Part: SX8722
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: XM8000EV120; XM8000EV120

8. Serial communication
The serial interface is a read-write 2 wire slave device. The SCL wire carries the clock information and SDA carries the data.
The output drivers on the bus are open drain current sinks.
The SCL wire is controlled by the master on the bus. Since the SX8722 is fairly slow, it may stretch the low clock phase
when required. The SDA wire is controlled by the master or the slave depending on the operation.
SDA only changes while the clock signal is low except for the (repeated) start or stop conditions.
The (repeated) start condition for the transmission is a high to low transition on SDA while SCL is high. The stop condition is
a low to high transition while SCL is high.
To read data from the SX8722, the master has to send successively a start bit, the slave address, a write bit. If the slave
address corresponds to the address of the SX8722 and the preceding operation is completed, the SX8722 sends an
acknowledge bit. The master then sends the read command which is acknowledged by the salve, the memory address that
it would like to read which is also acknowledged by the slave. The master issues a repeated start, repeats the slave address
and read bit. The slave acknowledges and returns the data to the master. The master terminates the communication by a
"not acknowledge" and a stop bit.
To write data to the SX8722, the format is very similar. Only the data direction is different and the acknowledgement of the
slave after the data reception.
8.1. Write data direct
The diagram below shows the write operation.
The diagram below shows the write operation at successive addresses (burst mode)
ACS - Revision 4.2
©2008 Semtech Corp.
ADVANCED COMMUNICATIONS & SENSING
SDA
M
S
A
R
S
B
T
T
SDA
ADDRESS
DEVICE
R
M
S
T
A
T
S
B
ADDRESS
L
S
B
Figure 8. I2C frame: write burst register, command 0x10
DEVICE
W
R
T
E
I
October 2008
Figure 7. I2C frame: write register, command 0x10
A
C
K
S
B
L
COMMAND
W
R
T
E
I
A
C
K
COMMAND
C
A
K
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REGISTER
ADDRESS
A
C
K
REGISTER
ADDRESS
High gain acquisition for sensor interface
C
A
K
REGISTER
VALUE (n)
A
C
K
REGISTER
VALUE
C
A
K
VALUE (n + x)
REGISTER
A
C
K
O
S
T
P
DATASHEET
www.semtech.com
SX8722
A
C
K
O
S
T
P