ATTINY20-EK1 Atmel, ATTINY20-EK1 Datasheet - Page 94

no-image

ATTINY20-EK1

Manufacturer Part Number
ATTINY20-EK1
Description
KIT EVAL TOUCH ATTINY20
Manufacturer
Atmel
Datasheet

Specifications of ATTINY20-EK1

Sensor Type
*
Sensing Range
*
Interface
*
Sensitivity
*
Voltage - Supply
*
Embedded
*
Utilized Ic / Part
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
TinyAVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
ATtiny20
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
Tool Type
Development Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor To Be Evaluated
ATtiny20
Interface Type
Touch
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
94
ATtiny20
Figure 12-10. Timer/Counter Timing Diagram, Setting of OCF1x, no Prescaling
Figure 12-11
Figure 12-11. Timer/Counter Timing Diagram, Setting of OCF1x, with Prescaler (f
Figure 12-12
frequency correct PWM mode the OCR1x Register is updated at BOTTOM. The timing diagrams
will be the same, but TOP should be replaced by BOTTOM, TOP-1 by BOTTOM+1 and so on.
The same renaming applies for modes that set the TOV1 flag at BOTTOM.
(PC and PFC PWM)
OCRnx
TCNTn
and ICFn
OCFnx
(clk
(CTC and FPWM)
TOVn
(Update at TOP)
clk
clk
I/O
I/O
TCNTn
TCNTn
OCRnx
Tn
as TOP)
(clk
/8)
clk
clk
I/O
(FPWM)
I/O
Tn
/1)
(if used
shows the same timing data, but with the prescaler enabled.
shows the count sequence close to TOP in various modes. When using phase and
OCRnx - 1
TOP - 1
TOP - 1
Old OCRnx Value
OCRnx
OCRnx Value
TOP
TOP
OCRnx + 1
BOTTOM
TOP - 1
New OCRnx Value
BOTTOM + 1
OCRnx + 2
clk_I/O
8235B–AVR–04/11
TOP - 2
/8)

Related parts for ATTINY20-EK1