ATTINY20-EK1 Atmel, ATTINY20-EK1 Datasheet - Page 99

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ATTINY20-EK1

Manufacturer Part Number
ATTINY20-EK1
Description
KIT EVAL TOUCH ATTINY20
Manufacturer
Atmel
Datasheet

Specifications of ATTINY20-EK1

Sensor Type
*
Sensing Range
*
Interface
*
Sensitivity
*
Voltage - Supply
*
Embedded
*
Utilized Ic / Part
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
TinyAVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
ATtiny20
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
Tool Type
Development Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor To Be Evaluated
ATtiny20
Interface Type
Touch
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
12.11 Register Description
12.11.1
8235B–AVR–04/11
TCCR1A – Timer/Counter1 Control Register A
• Bits 7:6 – COM1A[1:0] : Compare Output Mode for Channel A
• Bits 5:4 – COM1B[1:0] : Compare Output Mode for Channel B
The COM1A[1:0] and COM1B[1:0] control the Output Compare pins (OC1A and OC1B respec-
tively) behavior. If one or both of the COM1A[1:0] bits are written to one, the OC1A output
overrides the normal port functionality of the I/O pin it is connected to. If one or both of the
COM1B[1:0] bit are written to one, the OC1B output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-
ing to the OC1A or OC1B pin must be set in order to enable the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x[1:0] bits is depen-
dent of the WGM1[3:0] bits setting.
Table 12-2
CTC mode (non-PWM).
Table 12-2.
Table 12-3
Table 12-3.
Note:
Bit
0x24
Read/Write
Initial Value
COM1A1
COM1B1
COM1A1
COM1B1
0
0
1
1
0
0
1
1
A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. In this
case the compare match is ignored, but the set or clear is done at BOTTOM. See
Mode” on page 88
shows COM1x[1:0] bit functionality when WGM1[3:0] bits are set to fast PWM mode.
shows COM1x[1:0] bit functionality when WGM1[3:0] bits are set to a Normal or a
COM1A1
Compare Output Mode, non-PWM
Compare Output Mode, Fast PWM
R/W
7
0
COM1A0
COM1B0
COM1A0
COM1B0
COM1A0
for more details.
R/W
0
1
0
1
0
1
0
1
6
0
COM1B1
R/W
5
0
Description
Normal port operation, OC1A/OC1B disconnected
Toggle OC1A/OC1B on Compare Match
Clear OC1A/OC1B on Compare Match
(Set output to low level)
Set OC1A/OC1B on Compare Match
(Set output to high level).
Description
Normal port operation, OC1A/OC1B disconnected
WGM13=0: Normal port operation, OC1A/OC1B disconnected
WGM13=1: Toggle OC1A on Compare Match, OC1B reserved
Clear OC1A/OC1B on Compare Match, set OC1A/OC1B at
BOTTOM (non-inverting mode)
Set OC1A/OC1B on Compare Match, clear OC1A/OC1B at
BOTTOM (inverting mode)
COM1B0
R/W
4
0
R
3
0
R
2
0
WGM11
R/W
1
0
ATtiny20
WGM10
R/W
0
0
“Fast PWM
TCCR1A
99

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