PIC16F627A-I/SO Microchip Technology, PIC16F627A-I/SO Datasheet - Page 83

• Manufacturer Part Number: PIC16F627A-I/SO
• Description: IC MCU FLASH 1KX14 EEPROM 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F627A-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 18-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILI3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIPAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Follow these steps when setting up an Asynchronous
Reception:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. If any error occurred, clear the error by clearing
TABLE 12-7:
 2004 Microchip Technology Inc.
Legend: x = unknown, - = unimplemented locations read as ‘0’. Shaded cells are not used for Asynchronous Reception.
Address
0Ch
8Ch
18h
1Ah
98h
99h
TRISB<1> bit needs to be set and TRISB<2> bit
cleared in order to configure pins RB2/TX/CK
and RB1/RX/DT as the Universal Synchronous
Asynchronous Receiver Transmitter pins.
Initialize the SPBRG register for the appropriate
baud rate. If a high-speed baud rate is desired,
set bit BRGH. (Section 12.1 "USART Baud
Rate Generator (BRG)").
Enable the asynchronous serial port by clearing
bit SYNC, and setting bit SPEN.
If interrupts are desired, then set enable bit
RCIE.
If 9-bit reception is desired, then set bit RX9.
Enable the reception by setting bit CREN.
Flag bit RCIF will be set when reception is com-
plete and an interrupt will be generated if enable
bit RCIE was set.
Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
Read the 8-bit received data by reading the
RCREG register.
enable bit CREN.
RCREG USART Receive data registe
SPBRG Baud Rate Generator Register
RCSTA
TXSTA
Name
PIR1
PIE1
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
CSRC
SPEN
EEIE
Bit 7
EEIF
CMIE
CMIF
Bit 6
RX9
TX9
SREN
TXEN
RCIF
RCIE
Bit 5
CREN
SYNC
r
Bit 4
TXIF
TXIE
Preliminary
ADEN
PIC16F627A/628A/648A
Bit 3
—
—
—
CCP1IE TMR2IE TMR1IE 0000 -000 0000 -000
CCP1IF TMR2IF TMR1IF 0000 -000 0000 -000
BRGH
FERR
Bit 2
OERR
TRMT
Bit 1
RX9D
TX9D
Bit 0
0000 000x 0000 000x
0000 0000 0000 0000
0000 -010 0000 -010
0000 0000 0000 0000
Value on
POR
DS40044B-page 81
Value on
all other
Resets