PIC16F627A-I/SO Microchip Technology, PIC16F627A-I/SO Datasheet - Page 89

• Manufacturer Part Number: PIC16F627A-I/SO
• Description: IC MCU FLASH 1KX14 EEPROM 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F627A-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 18-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILI3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIPAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

12.5.2
The operation of the Synchronous Master and Mlave
modes is identical except in the case of the Sleep
mode. Also, bit SREN is a don't care in Slave mode.
If receive is enabled, by setting bit CREN, prior to the
SLEEP instruction, then a word may be received during
Sleep. On completely receiving the word, the RSR
register will transfer the data to the RCREG register
and if enable bit RCIE bit is set, the interrupt generated
will wake the chip from Sleep. If the global interrupt is
enabled, the program will branch to the interrupt vector
(0004h).
Follow these steps when setting up a Synchronous
Slave Reception:
1.
TABLE 12-11: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE TRANSMISSION
TABLE 12-12: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE RECEPTION
 2004 Microchip Technology Inc.
Legend: x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used for Synchronous Slave Transmission.
Legend: x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used for Synchronous Slave Reception.
Address
Address
0Ch
8Ch
0Ch
1Ah
8Ch
18h
19h
98h
99h
18h
98h
99h
TRISB<1> bit needs to be set and TRISB<2> bit
cleared in order to configure pins RB2/TX/CK
and RB1/RX/DT as the Universal Synchronous
Asynchronous Receiver Transmitter pins.
TXREG USART Transmit data register
SPBRG Baud Rate Generator Register
RCREG USART Receive data register
RCSTA
SPBRG Baud Rate Generator Register
TXSTA
RCSTA
TXSTA
USART SYNCHRONOUS SLAVE
RECEPTION
Name
Name
PIR1
PIE1
PIR1
PIE1
CSRC
SPEN
CSRC
SPEN
EEIF
EEIE
Bit 7
EEIE
Bit 7
EEIF
CMIE
CMIF
CMIF
CMIE
Bit 6
RX9
Bit 6
TX9
RX9
TX9
SREN CREN
TXEN SYNC
SREN CREN
TXEN SYNC
RCIE
RCIF
RCIE
Bit 5
RCIF
Bit 5
TXIE
Bit 4
TXIF
TXIE
Bit 4
TXIF
Preliminary
ADEN
ADEN
Bit 3
Bit 3
—
—
—
—
—
—
PIC16F627A/628A/648A
CCP1IE TMR2IE TMR1IE 0000 -000
CCP1IF TMR2IF TMR1IF 0000 -000
CCP1IE TMR2IE TMR1IE 0000 -000
CCP1IF TMR2IF TMR1IF 0000 -000
BRGH
BRGH
FERR
FERR
2.
3.
4.
5.
6.
7.
8.
9.
Bit 2
Bit 2
Enable the synchronous master serial port by
setting bits SYNC and SPEN and clearing bit
CSRC.
If interrupts are desired, then set enable bit
RCIE.
If 9-bit reception is desired, then set bit RX9.
To enable reception, set enable bit CREN.
Flag bit RCIF will be set when reception is
complete and an interrupt will be generated, if
enable bit RCIE was set.
Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
Read the 8-bit received data by reading the
RCREG register.
If any error occurred, clear the error by clearing
bit CREN.
OERR
TRMT
OERR
TRMT
Bit 1
Bit 1
RX9D
TX9D
RX9D
TX9D
Bit 0
Bit 0
0000 000x
0000 0000
0000 -010
0000 0000
0000 000x
0000 0000
0000 -010
0000 0000
Value on
Value on
POR
POR
DS40044B-page 87
other Resets
other Resets
Value on all
0000 -000
0000 000x
0000 0000
0000 -000
0000 -010
0000 0000
Value on all
0000 -000
0000 000x
0000 0000
0000 -000
0000 -010
0000 0000