PIC18F26K20-E/SP Microchip Technology, PIC18F26K20-E/SP Datasheet - Page 106
![IC PIC MCU FLASH 32KX16 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F26K20-E/SP
Manufacturer Part Number
PIC18F26K20-E/SP
Description
IC PIC MCU FLASH 32KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(456 pages)
3.PIC18F26K20-ISS.pdf
(6 pages)
4.PIC18F26K20-ISS.pdf
(10 pages)
5.PIC18F26K20-ISO.pdf
(430 pages)
Specifications of PIC18F26K20-E/SP
Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3936 B
Interface Type
CCP, ECCP, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC18F25K20T-ISS PDF datasheet
- PIC18F25K20T-ISS PDF datasheet #2
- PIC18F26K20-ISS PDF datasheet #3
- PIC18F26K20-ISS PDF datasheet #4
- PIC18F26K20-ISO PDF datasheet #5
- Current page: 106 of 430
- Download datasheet (7Mb)
PIC18F2XK20/4XK20
Example 8-3 shows the sequence to do a 16 x 16
unsigned multiplication. Equation 8-1 shows the
algorithm that is used. The 32-bit result is stored in four
registers (RES<3:0>).
EQUATION 8-1:
EXAMPLE 8-3:
Example 8-4 shows the sequence to do a 16 x 16
signed multiply. Equation 8-2 shows the algorithm
used. The 32-bit result is stored in four registers
(RES<3:0>). To account for the sign bits of the argu-
ments, the MSb for each argument pair is tested and
the appropriate subtractions are done.
DS41303D-page 104
RES3:RES0
;
;
;
MOVF
MULWF
MOVFF
MOVFF
MOVF
MULWF
MOVFF
MOVFF
MOVF
MULWF
MOVF
ADDWF
MOVF
ADDWFC RES2, F
CLRF
ADDWFC RES3, F
MOVF
MULWF
MOVF
ADDWF
MOVF
ADDWFC RES2, F
CLRF
ADDWFC RES3, F
=
=
ARG1L, W
ARG2L
PRODH, RES1
PRODL, RES0
ARG1H, W
ARG2H
PRODH, RES3
PRODL, RES2
ARG1L, W
ARG2H
PRODL, W
RES1, F
PRODH, W
WREG
ARG1H, W
ARG2L
PRODL, W
RES1, F
PRODH, W
WREG
ARG1H:ARG1L • ARG2H:ARG2L
(ARG1H • ARG2H • 2
(ARG1H • ARG2L • 2
(ARG1L • ARG2H • 2
(ARG1L • ARG2L)
16 x 16 UNSIGNED
MULTIPLICATION
ALGORITHM
16 x 16 UNSIGNED
MULTIPLY ROUTINE
; ARG1L * ARG2L->
; PRODH:PRODL
;
;
; ARG1H * ARG2H->
; PRODH:PRODL
;
;
; ARG1L * ARG2H->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
;
; ARG1H * ARG2L->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
8
8
16
) +
) +
) +
Preliminary
EQUATION 8-2:
EXAMPLE 8-4:
RES3:RES0 = ARG1H:ARG1L • ARG2H:ARG2L
;
;
;
;
;
SIGN_ARG1
;
CONT_CODE
MOVF
MULWF
MOVFF
MOVFF
MOVF
MULWF
MOVFF
MOVFF
MOVF
MULWF
MOVF
ADDWF
MOVF
ADDWFC RES2, F
CLRF
ADDWFC RES3, F
MOVF
MULWF
MOVF
ADDWF
MOVF
ADDWFC RES2, F
CLRF
ADDWFC RES3, F
BTFSS
BRA
MOVF
SUBWF
MOVF
SUBWFB RES3
BTFSS
BRA
MOVF
SUBWF
MOVF
SUBWFB RES3
:
= (ARG1H • ARG2H • 2
(ARG1H • ARG2L • 2
(ARG1L • ARG2H • 2
(ARG1L • ARG2L) +
(-1 • ARG2H<7> • ARG1H:ARG1L • 2
(-1 • ARG1H<7> • ARG2H:ARG2L • 2
ARG1L, W
ARG2L
PRODH, RES1
PRODL, RES0
ARG1H, W
ARG2H
PRODH, RES3
PRODL, RES2
ARG1L, W
ARG2H
PRODL, W
RES1, F
PRODH, W
WREG
ARG1H, W
ARG2L
PRODL, W
RES1, F
PRODH, W
WREG
ARG2H, 7
SIGN_ARG1
ARG1L, W
RES2
ARG1H, W
ARG1H, 7
CONT_CODE
ARG2L, W
RES2
ARG2H, W
16 x 16 SIGNED
MULTIPLICATION
ALGORITHM
16 x 16 SIGNED
MULTIPLY ROUTINE
© 2008 Microchip Technology Inc.
; ARG1L * ARG2L ->
; PRODH:PRODL
;
;
; ARG1H * ARG2H ->
; PRODH:PRODL
;
;
; ARG1L * ARG2H ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
;
; ARG1H * ARG2L ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
; ARG2H:ARG2L neg?
; no, check ARG1
;
;
;
; ARG1H:ARG1L neg?
; no, done
;
;
;
8
8
16
) +
) +
) +
16
16
) +
)
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