ATMEGA8535L-8JU Atmel, ATMEGA8535L-8JU Datasheet - Page 187

MCU AVR 8K ISP FLASH MEM 44-PLCC

ATMEGA8535L-8JU

Manufacturer Part Number
ATMEGA8535L-8JU
Description
MCU AVR 8K ISP FLASH MEM 44-PLCC
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8535L-8JU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
512Byte
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA8535L-8JU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA8535L-8JUR
Manufacturer:
Atmel
Quantity:
10 000
2502K–AVR–10/06
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Assembly Code Example
ldi
out
wait1:
in
sbrs r16,TWINT
rjmp wait1
in
andi r16, 0xF8
cpi
brne ERROR
ldi
out
ldi
out
wait2:
in
sbrs r16,TWINT
rjmp wait2
in
andi r16, 0xF8
cpi
brne ERROR
ldi
out
ldi
out
wait3:
in
sbrs r16,TWINT
rjmp wait3
in
andi r16, 0xF8
cpi
brne ERROR
ldi
out
r16, (1<<TWINT)|(1<<TWSTA)|
(1<<TWEN)
TWCR, r16
r16,TWCR
r16,TWSR
r16, START
r16, SLA_W
TWDR, r16
r16, (1<<TWINT) | (1<<TWEN)
TWCR, r16
r16,TWCR
r16,TWSR
r16, MT_SLA_ACK
r16, DATA
TWDR, r16
r16, (1<<TWINT) | (1<<TWEN)
TWCR, r16
r16,TWCR
r16,TWSR
r16, MT_DATA_ACK
r16, (1<<TWINT)|(1<<TWEN)|
(1<<TWSTO)
TWCR, r16
In the following an assembly and C implementation of the example is given. Note that
the code below assumes that several definitions have been made, for example by using
include-files.
C Example
TWCR = (1<<TWINT)|(1<<TWSTA)|
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) != START)
TWDR = SLA_W;
TWCR = (1<<TWINT) | (1<<TWEN);
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) != MT_SLA_ACK)
TWDR = DATA;
TWCR = (1<<TWINT) | (1<<TWEN);
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) != MT_DATA_ACK)
TWCR = (1<<TWINT)|(1<<TWEN)|
(1<<TWEN)
(1<<TWSTO);
;
ERROR();
;
ERROR();
;
ERROR();
Comments
Send START condition.
Wait for TWINT Flag set. This
indicates that the START condition
has been transmitted.
Check value of TWI Status
Register. Mask prescaler bits. If
status different from START go to
ERROR.
Load SLA_W into TWDR Register.
Clear TWINT bit in TWCR to start
transmission of address.
Wait for TWINT Flag set. This
indicates that the SLA+W has been
transmitted, and ACK/NACK has
been received.
Check value of TWI Status
Register. Mask prescaler bits. If
status different from MT_SLA_ACK
go to ERROR.
Load DATA into TWDR Register.
Clear TWINT bit in TWCR to start
transmission of address.
Wait for TWINT Flag set. This
indicates that the DATA has been
transmitted, and ACK/NACK has
been received.
Check value of TWI Status
Register. Mask prescaler bits. If
status different from
MT_DATA_ACK go to ERROR.
Transmit STOP condition.
ATmega8535(L)
187

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