ATMEGA8535L-8JU Atmel, ATMEGA8535L-8JU Datasheet - Page 200

• Manufacturer Part Number: ATMEGA8535L-8JU
• Description: MCU AVR 8K ISP FLASH MEM 44-PLCC
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8535L-8JU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 512Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Miscellaneous States
Table 79. Miscellaneous States
200
Status Code
(TWSR)
Prescaler Bits
are 0
0xF8
0x00
ATmega8535(L)
Status of the Two-wire Serial
Bus and Two-wire Serial Inter-
face Hardware
No relevant state information
available; TWINT = “0”
Bus error due to an illegal
START or STOP condition
Figure 93. Formats and States in the Slave Transmitter Mode
There are two status codes that do not correspond to a defined TWI state, see Table 79.
Status 0xF8 indicates that no relevant information is available because the TWINT Flag
is not set. This occurs between other states, and when the TWI is not involved in a serial
transfer.
Status 0x00 indicates that a bus error has occurred during a Two-wire Serial Bus trans-
fer. A bus error occurs when a START or STOP condition occurs at an illegal position in
the format frame. Examples of such illegal positions are during the serial transfer of an
address byte, a data byte, or an acknowledge bit. When a bus error occurs, TWINT is
set. To recover from a bus error, the TWSTO Flag must set and TWINT must be cleared
by writing a logic one to it. This causes the TWI to enter the not addressed Slave mode
and to clear the TWSTO Flag (no other bits in TWCR are affected). The SDA and SCL
lines are released, and no STOP condition is transmitted.
Reception of the own
slave address and one or
more data bytes
Arbitration lost as master
and addressed as slave
Last data byte transmitted.
Switched to not addressed
slave (TWEA = '0')
To/from TWDR
No TWDR action
No TWDR action
From master to slave
From slave to master
Application Software Response
S
STA
0
SLA
No TWCR Action
STO
1
To TWCR
R
DATA
TWINT
1
$A8
$B0
A
A
n
TWEA
X
A
DATA
Next Action Taken by TWI Hardware
Wait or proceed current transfer
Only the internal hardware is affected, no STOP condi-
tion is sent on the bus. In all cases, the bus is released
and TWSTO is cleared.
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the Two-wire Serial Bus. The
prescaler bits are zero or masked to zero
$B8
A
DATA
$C0
$C8
A
A
2502K–AVR–10/06
P or S
All 1's
P or S