DSPIC33FJ64MC202-I/SP Microchip Technology, DSPIC33FJ64MC202-I/SP Datasheet - Page 146
![IC DSPIC MCU/DSP 64K 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
DSPIC33FJ64MC202-I/SP
Manufacturer Part Number
DSPIC33FJ64MC202-I/SP
Description
IC DSPIC MCU/DSP 64K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
2.DSPIC33FJ32MC302-ISO.pdf
(436 pages)
3.DSPIC33FJ64MC202-ESO.pdf
(424 pages)
Specifications of DSPIC33FJ64MC202-I/SP
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
8 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- DSPIC33FJ32MC202-IMM PDF datasheet
- DSPIC33FJ32MC302-ISO PDF datasheet #2
- DSPIC33FJ64MC202-ESO PDF datasheet #3
- Current page: 146 of 424
- Download datasheet (6Mb)
9.1
The dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/
X04 and dsPIC33FJ128MCX02/X04 devices provide
seven system clock options:
• Fast RC (FRC) Oscillator
• FRC Oscillator with Phase Locked Loop (PLL)
• Primary (XT, HS or EC) Oscillator
• Primary Oscillator with PLL
• Secondary (LP) Oscillator
• Low-Power RC (LPRC) Oscillator
• FRC Oscillator with postscaler
9.1.1
The Fast RC (FRC) internal oscillator runs at a nominal
frequency of 7.37 MHz. User software can tune the
FRC frequency. User software can optionally specify a
factor (ranging from 1:2 to 1:256) by which the FRC
clock frequency is divided. This factor is selected using
the FRCDIV<2:0> (CLKDIV<10:8>) bits.
The primary oscillator can use one of the following as
its clock source:
• Crystal (XT): Crystals and ceramic resonators in
• High-Speed Crystal (HS): Crystals in the range of
• External Clock (EC): External clock signal is
The secondary (LP) oscillator is designed for low power
and uses a 32.768 kHz crystal or ceramic resonator.
The LP oscillator uses the SOSCI and SOSCO pins.
The Low-Power RC (LPRC) internal oscIllator runs at a
nominal frequency of 32.768 kHz. It is also used as a
reference clock by the Watchdog Timer (WDT) and
Fail-Safe Clock Monitor (FSCM).
The clock signals generated by the FRC and primary
oscillators can be optionally applied to an on-chip PLL
to provide a wide range of output frequencies for device
operation.
Section 9.1.4 “PLL Configuration”.
The FRC frequency depends on the FRC accuracy
(see Table 31-19) and the value of the FRC Oscillator
Tuning register (see Register 9-4).
DS70291D-page 146
the range of 3 MHz to 10 MHz. The crystal is
connected to the OSC1 and OSC2 pins.
10 MHz to 40 MHz. The crystal is connected to
the OSC1 and OSC2 pins.
directly applied to the OSC1 pin.
CPU Clocking System
SYSTEM CLOCK SOURCES
PLL
configuration
is
described
Preliminary
in
9.1.2
The oscillator source used at a device Power-on
Reset event is selected using Configuration bit
settings. The oscillator Configuration bit settings are
located in the Configuration registers in the program
memory. (Refer to Section 28.1 “Configuration
Bits” for further details.) The Initial Oscillator
Selection
(FOSCSEL<2:0>), and the Primary Oscillator Mode
Select
(FOSC<1:0>), select the oscillator source that is used
at a Power-on Reset. The FRC primary oscillator is
the default (unprogrammed) selection.
The Configuration bits allow users to choose among 12
different clock modes, shown in Table 9-1.
The output of the oscillator (or the output of the PLL
if a PLL mode has been selected) F
2 to generate the device instruction clock (F
the peripheral clock time base (F
operating speed of the device, and speeds up to 40
MHz are supported by the dsPIC33FJ32MC302/304,
dsPIC33FJ64MCX02/X04
dsPIC33FJ128MCX02/X04 architecture.
Instruction execution speed or device operating
frequency, F
EQUATION 9-1:
9.1.3
The Auxiliary Oscillator (AOSC) can be used for periph-
eral that needs to operate at a frequency unrelated to
the system clock such as DAC.
The Auxiliary Oscillator can use one of the following as
its clock source:
Crystal (XT): Crystal and ceramic resonators in the
range of 3 Mhz to 10 Mhz. The crystal is connected to
the SOCI and SOSCO pins.
High-Speed Crystal (HS): Crystals in the range of 10 to
40 Hz. The crystal is connected to the SOSCI and
SOSCO pins.
External Clock (EC): External clock signal up to
64 Mhz. The external clock signal is directly applied to
SOSCI pin.
Configuration
SYSTEM CLOCK SELECTION
AUXILIARY OSCILLATOR
CY
Configuration
, is given by:
F
CY
DEVICE OPERATING
FREQUENCY
© 2009 Microchip Technology Inc.
= F
OSC
bits,
/2
bits,
P
). F
OSC
POSCMD<1:0>
CY
FNOSC<2:0>
is divided by
defines the
CY
) and
and
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