DSPIC33FJ64MC202-I/SP Microchip Technology, DSPIC33FJ64MC202-I/SP Datasheet - Page 309
![IC DSPIC MCU/DSP 64K 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
DSPIC33FJ64MC202-I/SP
Manufacturer Part Number
DSPIC33FJ64MC202-I/SP
Description
IC DSPIC MCU/DSP 64K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
2.DSPIC33FJ32MC302-ISO.pdf
(436 pages)
3.DSPIC33FJ64MC202-ESO.pdf
(424 pages)
Specifications of DSPIC33FJ64MC202-I/SP
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
8 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- DSPIC33FJ32MC202-IMM PDF datasheet
- DSPIC33FJ32MC302-ISO PDF datasheet #2
- DSPIC33FJ64MC202-ESO PDF datasheet #3
- Current page: 309 of 424
- Download datasheet (6Mb)
26.0
The programmable CRC generator offers the following
features:
• User-programmable polynomial CRC equation
• Interrupt output
• Data FIFO
FIGURE 26-1:
© 2009 Microchip Technology Inc.
D
Note 1: This data sheet summarizes the features
PLEN<3:0>
OUT
XOR
2: Some registers and associated bits
PROGRAMMABLE CYCLIC
REDUNDANCY CHECK (CRC)
GENERATOR
of
dsPIC33FJ64MCX02/X04
dsPIC33FJ128MCX02/X04
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet,
Programmable
Check
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip website (www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
IN
p_clk
Hold
BIT 0
OUT
the
0
(CRC)”
refer
CRC SHIFTER DETAILS
dsPIC33FJ32MC302/304,
Cyclic
to
X1
0
1
(DS70298)
“Section
IN
p_clk
BIT 1
Redundancy
Hold
OUT
family
of
1
and
36.
the
Preliminary
CRC Shift Register
of
X2
0
1
CRC Write Bus
26.1
The module implements a software configurable CRC
generator. The terms of the polynomial and its length
can be programmed using the CRCXOR (X<15:1>) bits
and the CRCCON (PLEN<3:0>) bits, respectively.
EQUATION 26-1:
To program this polynomial into the CRC generator,
the CRC register bits should be set as shown in
Table 26-1.
TABLE 26-1:
For the value of X<15:1>, the 12th bit and the 5th bit are
set to ‘1’, as required by the CRC equation. The 0th bit
required by the CRC equation is always XORed. For a
16-bit polynomial, the 16th bit is also always assumed
to be XORed; therefore, the X<15:1> bits do not have
the 0th bit or the 16th bit.
The topology of a standard CRC generator is shown in
Figure 26-2.
IN
p_clk
Hold
BIT 2
PLEN<3:0>
OUT
Bit Name
X<15:1>
2
Overview
CRC Read Bus
x
16
EXAMPLE CRC SETUP
X3
0
1
+
CRC EQUATION
x
12
X15
000100000010000
0
1
+
x
5
Bit Value
+
IN
BIT 15
1
1111
p_clk
Hold
DS70291D-page 309
OUT
15
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