AT32UC3B164-Z1UT Atmel, AT32UC3B164-Z1UT Datasheet - Page 212
![IC MCU AVR32 64KB FLASH 48-QFN](/photos/6/82/68297/48-qfn_sml.jpg)
AT32UC3B164-Z1UT
Manufacturer Part Number
AT32UC3B164-Z1UT
Description
IC MCU AVR32 64KB FLASH 48-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3B164-Z1UT
Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
28
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
28
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1101
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Package
48QFN EP
Device Core
AVR32
Family Name
AT32
Maximum Speed
60 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3B164-Z1UT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 212 of 692
- Download datasheet (11Mb)
18.8.5
Name:
Access Type:
Offset:
Reset Value:
• SPIENS: SPI Enable Status
• TXEMPTY: Transmission Registers Empty
• NSSR: NSS Rising
• OVRES: Overrun Error Status
• MODF: Mode Fault Error
• TDRE: Transmit Data Register Empty
• RDRF: Receive Data Register Full
32059K–03/2011
31
23
15
–
–
–
7
–
0: SPI is disabled.
1: SPI is enabled.
0: As soon as data is written in TDR.
1: TDR and internal shifter are empty. If a transfer delay has been defined, TXEMPTY is set after the completion of such delay.
0: No rising edge detected on NSS pin since last read.
1: A rising edge occurred on NSS pin since last read.
0: No overrun has been detected since the last read of SR.
1: An overrun has occurred since the last read of SR.
An overrun occurs when RDR is loaded at least twice from the serializer since the last read of the RDR.
0: No Mode Fault has been detected since the last read of SR.
1: A Mode Fault occurred since the last read of the SR.
0: Data has been written to TDR and not yet transferred to the serializer.
1: The last data written in the Transmit Data Register has been transferred to the serializer.
TDRE equals zero when the SPI is disabled or at reset. The SPI enable command sets this bit to one.
0: No data has been received since the last read of RDR
1: Data has been received and the received data has been transferred from the serializer to RDR since the last read of RDR.
Status Register
30
22
14
SR
Read-only
0x10
0x00000000
–
–
–
6
–
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
OVRES
27
19
11
–
–
–
3
MODF
26
18
10
–
–
2
-
TXEMPTY
TDRE
25
17
–
–
9
1
AT32UC3B
SPIENS
NSSR
RDRF
24
16
–
8
0
212
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