PIC32MX440F256H-80I/PT Microchip Technology, PIC32MX440F256H-80I/PT Datasheet - Page 399

• Manufacturer Part Number: PIC32MX440F256H-80I/PT
• Description: IC PIC MCU FLASH 256K 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F256H-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 256KB (256K x 8)
• Package / Case: 64-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Embedded Interface Type: EUSART, I2C, SPI, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.2.5
In Master mode, the SPI module clock source is the
peripheral bus clock (PBCLK) and the SCK clock baud
rate is derived from the PBCLK clock and the SPIxBRG
register.
Equation 17-1 defines the SCKx clock frequency as a
function of the SPIxBRG register settings.
EQUATION 17-1:
Note that the maximum possible baud rate is
F
rate is F
Sample SPI clock frequencies are shown in the table
Table 17-6.
TABLE 17-6:
17.2.6
When a new data word has been shifted into shift reg-
ister SPIxSR and the previous contents of receive reg-
ister SPIxRXB have not been read by the user
software, the SPIROV bit (SPIxSTAT<6>) will be set.
The module will not transfer the received data from
SPIxSR to the SPIxRXB. Further data reception is dis-
abled until the SPIROV bit is cleared. The SPIROV bit
is not cleared automatically by the module and must be
cleared by the user software.
© 2008 Microchip Technology Inc.
SPIxBRG setting
F
F
F
F
F
PB
PB
PB
PB
PB
PB
Note:
/2 (SPIXBRG = 0) and the minimum possible baud
= 50 MHz
= 40 MHz
= 25 MHz
= 20 MHz
= 10 MHZ
PB
/1024.
SPI MASTER MODE CLOCK
FREQUENCY
SPI Error Handling
The SCKx signal clock is not free running
for nonframed SPI modes. It will only run
for 8, 16 or 32 pulses when the SPIxBUF
is loaded with data. It will however, be
continuous for Framed modes.
F
SCK
=
SAMPLE SCKX FREQUENCIES
2 * (SPIxBRG+1)
SPI CLOCK FREQUENCY
25.00 MHz
20.00 MHz
12.50 MHz
10.00 MHz
5.00 MHz
F
0
PB
781.25 KHz
625.00 KHz
312.50 KHz
1.56 MHz
1.25 MHz
15
Preliminary
781.25 KHz
625.00 KHz
390.63 KHz
312.50 KHz
156.25 KHz
31
PIC32MX3XX/4XX
390.63 KHz
312.50 KHz
195.31 KHz
156.25 KHz
78.13 KHz
63
232.56 KHz
145.35 KHz
116.28 KHz
290.7 KHz
58.14 KHz
85
DS61143C-page 397
195.31 KHz
156.25 KHz
97.66 KHz
78.13 KHz
39.06 KHz
127