PIC32MX440F256H-80I/PT Microchip Technology, PIC32MX440F256H-80I/PT Datasheet - Page 507

IC PIC MCU FLASH 256K 64-TQFP

PIC32MX440F256H-80I/PT

Manufacturer Part Number
PIC32MX440F256H-80I/PT
Description
IC PIC MCU FLASH 256K 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX440F256H-80I/PT

Program Memory Type
FLASH
Program Memory Size
256KB (256K x 8)
Package / Case
64-TFQFP
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C , SPI , UART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
51
Number Of Timers
5 x 16 bit, 1 x 32 bit
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
PIC32
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
5
Embedded Interface Type
EUSART, I2C, SPI, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX440F256H-80I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC32MX440F256H-80I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
22.4.12.2
ing input selections. The first sample uses the MUX A
inputs specified by the CH0SA (AD1CHS<19:16>) and
CH0NA (AD1CHS<23>) bits. The next sample uses the
MUX
(AD1CHS<27:24>) and CH0NB (AD1CHS<31>) bits.
In the following example, one of the MUX B input
specifications uses 2 analog inputs as a differential
source to the sample/hold.
This example also demonstrates use of the dual 8-word
buffers. An interrupt occurs after every 4th sample,
which results in filling 4-words into the buffer on each
interrupt.
22.4.12.3
It is possible to sample by scanning through the input
channels and alternate between MUX A and MUX B.
When the Alternating Sample mode is selected, the
first input to be sampled will be the input selected for
MUX A, the second sample will be the input selected
for MUX B. Then the process repeats. When scanning
is combined with Alternating Input mode, the positive
input to MUX A is selected by the contents of the
AD1CSSL register, not CH0SA. For each sample that
MUX A is selected the next item in the scan list is sam-
pled. The positive input to MUX B is selected by
CH0SB (AD1CHS<27:24>).
When ASAM (AD1CON1<2>) is clear, sampling will not
resume after conversion completion, but will occur
when setting the SAMP (AD1CON1<1>) bit.
© 2008 Microchip Technology Inc.
Setting the ALTS (AD1CON2<0>) bit enables alternat-
B
inputs
Example: Using Alternating MUX A,
MUX B Input Selections
Example: Converting Three Analog
Inputs Using Alternating Sample
Mode and a Scan List
specified
by
the
CH0SB
Preliminary
22.5
A simple initialization code example for the ADC
module is provided in Example 22-4.
In this particular configuration, all 16 analog input pins,
AN0-AN15, are set up as analog inputs. Operation in
IDLE mode is disabled, output data is in unsigned frac-
tional format, and AV
V
sion (conversion trigger), are performed manually in
software. The CH0 SHA is used for conversions. Scan-
ning of inputs is disabled, and an interrupt occurs after
every acquisition/convert sequence (1 conversion
result). The ADC conversion clock is T
Since acquisition is started manually by setting the
SAMP bit (AD1CON1<1>) after each conversion is
complete, the auto-sample time bits, SAMC<4:0>
(AD1CON3<12:8>), are ignored. Moreover, since the
start of conversion (i.e., end of acquisition) is also trig-
gered manually, the SAMP bit needs to be cleared
each time a new sample needs to be converted.
R
-. The start of acquisition, as well as start of conver-
PIC32MX3XX/4XX
Initialization
DD
and AV
SS
are used for V
DS61143C-page 505
PB
/2.
R
+ and

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