PIC18F8720-I/PT Microchip Technology, PIC18F8720-I/PT Datasheet - Page 144

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PIC18F8720-I/PT

Manufacturer Part Number
PIC18F8720-I/PT
Description
IC MCU FLASH 64KX16 EE 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F8720-I/PT

Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.75 KB
Interface Type
I2C/SPI/USART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183032, DM183022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Package
80TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
25 MHz
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC18F6520/8520/6620/8620/6720/8720
13.2
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon Reset.
FIGURE 13-1:
TABLE 13-1:
DS39609B-page 142
INTCON GIE/GIEH PEIE/GIEL
PIR1
PIE1
IPR1
TMR2
T2CON
PR2
Legend:
Name
Timer2 Interrupt
Timer2 Module Register
Timer2 Period Register
PSPIE
PSPIP
x = unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by the Timer2 module.
PSPIF
Bit 7
Note 1: TMR2 register output can be software selected by the SSP module as a baud clock.
F
OSC
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
/4
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
TIMER2 BLOCK DIAGRAM
ADIE
ADIP
Bit 6
ADIF
T2CKPS1:T2CKPS0
1:1, 1:4, 1:16
TMR0IE
Prescaler
RCIF
RCIE
RCIP
Bit 5
2
INT0IE
TXIF
TXIE
TXIP
Bit 4
Comparator
TMR2
PR2
SSPIE
SSPIP
SSPIF
RBIE
Bit 3
13.3
The output of TMR2 (before the postscaler) is fed to the
synchronous serial port module, which optionally uses
it to generate the shift clock.
EQ
TMR0IF
CCP1IF
CCP1IE
CCP1IP
Reset
T2OUTPS3:T2OUTPS0
Bit 2
Postscaler
1:1 to 1:16
Output of TMR2
TMR2IE
TMR2IP
TMR2IF
INT0IF
Output
Bit 1
TMR2
4
(1)
TMR1IF 0000 0000 0000 0000
TMR1IE 0000 0000 0000 0000
TMR1IP 0111 1111 0111 1111
RBIF
 2004 Microchip Technology Inc.
Bit 0
0000 0000 0000 0000
0000 0000 0000 0000
1111 1111 1111 1111
POR, BOR
bit TMR2IF
Value on
Sets Flag
Value on
all other
Resets

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