Z8F0411HH020SG Zilog, Z8F0411HH020SG Datasheet - Page 164
Z8F0411HH020SG
Manufacturer Part Number
Z8F0411HH020SG
Description
IC ENCORE MCU FLASH 4K 20SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F0411HH020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
11
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Controller Family/series
Z8
No. Of I/o's
11
Ram Memory Size
1KB
Cpu Speed
20MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
Z8F041xx
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
11
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-4101
Z8F0411HH020SG
Z8F0411HH020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F0411HH020SG
Manufacturer:
Zilog
Quantity:
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Table 78. ADC Data High Byte Register (ADCD_H)
Table 79. ADC Data Low Bits Register (ADCD_L)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
ADC Data High Byte Register
ADC Data Low Bits Register
7
7
0101 = Reserved
011X = Reserved
1XXX = Reserved
The ADC Data High Byte register contains the upper eight bits of the 10-bit ADC output.
During a SINGLE-SHOT conversion, this value is invalid. Access to the ADC Data High
Byte register is read-only. The full 10-bit ADC result is given by {ADCD_H[7:0],
ADCD_L[7:6]}. Reading the ADC Data High Byte register latches data in the ADC Low
Bits register.
ADCD_H—ADC Data High Byte
This byte contains the upper eight bits of the 10-bit ADC output. These bits are not valid
during a single-shot conversion. During a continuous conversion, the last conversion
output is held in this register. These bits are undefined after a Reset.
The ADC Data Low Bits register contains the lower two bits of the conversion value. The
data in the ADC Data Low Bits register is latched each time the ADC Data High Byte
register is read. Reading this register always returns the lower two bits of the conversion
last read into the ADC High Byte register. Access to the ADC Data Low Bits register is
read-only. The full 10-bit ADC result is given by {ADCD_H[7:0], ADCD_L[7:6]}.
ADCD_L
6
6
5
5
4
4
ADCD_H
F72H
F73H
R
R
X
X
3
3
Reserved
Z8 Encore! XP
2
2
Product Specification
Analog-to-Digital Converter
1
1
®
F0822 Series
0
0
151
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