C8051F702-GQ Silicon Laboratories Inc, C8051F702-GQ Datasheet - Page 78

IC 8051 MCU 16K FLASH 64-TQFP

C8051F702-GQ

Manufacturer Part Number
C8051F702-GQ
Description
IC 8051 MCU 16K FLASH 64-TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F70xr
Datasheets

Specifications of C8051F702-GQ

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
64-TQFP, 64-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, Temp Sensor, WDT
Number Of I /o
54
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F7x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
54
Number Of Timers
4 x 16 bit
Operating Supply Voltage
1.8 V to 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F700DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1635 - DEV KIT FOR C8051F700
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1608

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F702-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F702-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F70x/71x
14.1. Comparator Multiplexer
C8051F70x/71x devices include an analog input multiplexer to connect Port I/O pins to the comparator
inputs. The Comparator0 inputs are selected in the CPT0MX register (SFR Definition 14.3). The CMX0P2–
CMX0P0 bits select the Comparator0 positive input; the CMX0N2–CMX0N0 bits select the Comparator0
negative input.
Important Note About Comparator Inputs: The Port pins selected as comparator inputs should be con-
figured as analog inputs in their associated Port configuration register, and configured to be skipped by the
Crossbar (for details on Port configuration, see Section “28.6. Special Function Registers for Accessing
and Configuring Port I/O” on page 194).
78
Figure 14.3. Comparator Input Multiplexer Block Diagram
P1.7 / P2.0*
*P1.7 on 64 and 48-pin devices, P2.0 on 32 and 24-pin devices
P1.1
P1.3
P1.5
P1.0
P1.2
P1.4
P1.6
CPT0MX
Rev. 1.0
CP0 +
CP0 -
-
+
VDD
GND

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