R5F212B7SNFP#U0 Renesas Electronics America, R5F212B7SNFP#U0 Datasheet - Page 441

• Manufacturer Part Number: R5F212B7SNFP#U0
• Description: IC R8C/2B MCU FLASH 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Br

Specifications of R5F212B7SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2A Group, R8C/2B Group
Rev.2.00
REJ09B0324-0200
Figure 16.20
TDRE bit in
SSSR register
TEND bit in
SSSR register
TDRE bit in
SSSR register
TEND bit in
SSSR register
Processing
by program
Processing
by program
Nov 26, 2007
• CPHS bit = 0 (data change at odd edges) and CPOS bit = 0 (“H” when clock stops)
• CPHS bit = 1 (data change at even edges) and CPOS bit = 0 (“H” when clock stops)
(output)
(output)
SSCK
SSCK
SSO
SSO
Example of Clock Synchronous Serial I/O with Chip Select Operation during Data
Transmission (4-Wire Bus Communication Mode)
SCS
SCS
1
0
1
0
1
0
1
0
CPHS, CPOS: Bits in SSMR register
Data write to SSTDR register
Data write to SSTDR register
Page 419 of 580
TXI interrupt request is
generated
TXI interrupt request is
generated
b7
b7
1 frame
b6
1 frame
b6
b0
b0
TXI interrupt request is
generated
TXI interrupt request is
generated
b7
1 frame
b7
b6
TEI interrupt request is
generated
TEI interrupt request is
generated
1 frame
16. Clock Synchronous Serial Interface
b6
b0
b0
High-impedance
High-impedance