MC9S12E64CFUE Freescale Semiconductor, MC9S12E64CFUE Datasheet - Page 239

• Manufacturer Part Number: MC9S12E64CFUE
• Description: IC MCU 64K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E64CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Package: 80PQFP
• Family Name: HCS12
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 60
• Interface Type: SCI/SPI
• On-chip Adc: 16-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 12
• Processor Series: S12E
• Core: HCS12
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 25 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 58
• Ram Memory Size: 4KB
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.2.1
This pin is used as the analog output pin of the DAC8B1C module. The value represents the analog voltage
level between V
7.2.2
This pin serves as the power supply pin.l
7.2.3
This pin serves as an analog ground reference to the DAC.
7.2.4
This pin serves as the source for the high reference potential. Separation from the power supply pins
accommodates the filtering necessary to achieve the accuracy of which the system is capable.
7.2.5
This pin serves as the ground for the low reference potential. This pin is connected to V
DAC module boundary to accommodate the filtering necessary to achieve the accuracy of which the
system is capable.
7.3
This section provides a detailed description of all memory and registers accessible to the end user.
7.3.1
Figure 7-2
address offset is defined at the module level.
Freescale Semiconductor
Address
0x0000
0x0001
0x0002
0x0003
Memory Map and Registers
DACD (Right
summarizes the DAC8B1C memory map. The base address is defined at the chip level and the
DACD (Left
DAO — DAC Channel Output
V
V
V
V
Module Memory Map
Justified)
Justified)
DACC0
DACC1
Name
DDA
SSA
REF
RL
SSA
— DAC Reference Ground Supply
— DAC Reference Supply
— DAC Ground Supply
— DAC Power Supply
and V
W
W
W
W
R
R
R
R
REF
DACE
BIT 7
BIT 7
Bit 7
.
0
Figure 7-2. DAC8B1C Register Summary
MC9S12E128 Data Sheet, Rev. 1.07
= Unimplemented or Reserved
DACTE
BIT 6
BIT 6
6
0
BIT 5
BIT 5
5
0
0
BIT 4
BIT 4
4
0
0
Chapter 7 Digital-to-Analog Converter (DAC8B1CV1)
BIT 3
BIT 3
DJM
3
0
DSGN
BIT 2
BIT 2
2
0
DACWAI
SSA
BIT 1
BIT 1
1
0
outside the
DACOE
BIT 0
BIT 0
Bit 0
0
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