MC9S12E64CFUE Freescale Semiconductor, MC9S12E64CFUE Datasheet - Page 450

• Manufacturer Part Number: MC9S12E64CFUE
• Description: IC MCU 64K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E64CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Package: 80PQFP
• Family Name: HCS12
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 60
• Interface Type: SCI/SPI
• On-chip Adc: 16-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 12
• Processor Series: S12E
• Core: HCS12
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 25 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 58
• Ram Memory Size: 4KB
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 15 Background Debug Module (BDMV4)
15.3
A summary of the registers associated with the BDM is shown in
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
Detailed descriptions of the registers and associated bits are given in the subsections that follow.
15.3.1
450
Memory Map and Register Definition
Register
Address
Module Memory Map
8–
7
Reserved
BDM Status Register (BDMSTS)
Reserved
BDM CCR Holding Register (BDMCCR)
BDM Internal Register Position (BDMINR)
Reserved
MC9S12E128 Data Sheet, Rev. 1.07
Table 15-1. INT Memory Map
Use
Figure
15-2. Registers are accessed by
Freescale Semiconductor
Access
R/W
R/W
—
—
—
R