HD64F3687GFPV Renesas Electronics America, HD64F3687GFPV Datasheet - Page 126

• Manufacturer Part Number: HD64F3687GFPV
• Description: IC H8 MCU FLASH 56K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3687GFPV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 56KB (56K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Package: 64LQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 45
• Interface Type: I2C/SCI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 7 ROM
7.2.2
FLMCR2 is a register that displays the state of flash memory programming/erasing. FLMCR2 is a
read-only register, and should not be written to.
Rev.5.00 Nov. 02, 2005 Page 92 of 500
REJ09B0027-0500
Bit
2
1
0
Bit
7
6 to 0
Bit Name
PV
E
P
Bit Name
FLER
Flash Memory Control Register 2 (FLMCR2)
Initial
Value
0
0
0
Initial
Value
0
All 0
R/W
R/W
R/W
R/W
R/W
R
Description
Program-Verify
When this bit is set to 1, the flash memory changes to
program-verify mode. When it is cleared to 0, program-
verify mode is cancelled.
Erase
When this bit is set to 1 while SWE=1 and ESU=1, the
flash memory changes to erase mode. When it is cleared
to 0, erase mode is cancelled.
Program
When this bit is set to 1 while SWE=1 and PSU=1, the
flash memory changes to program mode. When it is
cleared to 0, program mode is cancelled.
Description
Flash Memory Error
Indicates that an error has occurred during an operation
on flash memory (programming or erasing). When FLER
is set to 1, flash memory goes to the error-protection
state.
See section 7.5.3, Error Protection, for details.
Reserved
These bits are always read as 0.