M30622SAFP#U5 Renesas Electronics America, M30622SAFP#U5 Datasheet - Page 467

• Manufacturer Part Number: M30622SAFP#U5
• Description: IC M16C MPU ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30622SAFP#U5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

DMAC
2-148
Figure 2.9.4. Example of operation of one-shot transfer mode
Operation (1) When software trigger is selected, setting software DMA request bit to “1” generates a DMA
BCLK
Address bus
RD signal
WR signal
Data bus
Write signal to
software DMAi
request bit
DMAi
request bit
DMA transfer
counter
DMAi
interrupt
request bit
DMAi
enable bit
2.9.2 Operation of DMAC (one-shot transfer mode)
In one-shot transfer mode, choose functions from the items shown in Table 2.9.1. Operations of the
circled items are described below. Figure 2.9.4 shows an example of operation and Figure 2.9.5
shows the set-up procedure.
Table 2.9.1. Choosed functions
(2) If DMAC is active, data transfer starts, and the contents of the address indicated by the DMAi
(3) If the DMA transfer counter underflows, the DMA enable bit changes to “0” and DMA transfer
• In the case in which the number of transfer times is set to 2.
Transfer space
Unit of transfer
CPU use
transfer request signal.
forward-direction address pointer are transferred to the address indicated by the DMAi desti-
nation pointer. When data transfer starts directly after DMAC becomes active, the value of
the DMAi transfer counter reload register is reloaded to the DMAi transfer counter, and the
value of the DMAi source pointer is reloaded by the DMAi forward-direction address pointer.
Each time a DMA transfer request signal is generated, 1 byte of data is transferred. The
DMAi transfer counter is down counted, and the DMAi forward-direction address pointer is up
counted.
is completed. The DMA interrupt request bit changes to “1” simultaneously.
Indeterminate
Item
(1) Request signal for a DMA transfer occurs
CPU use
O
O
Source
(2) Data transfer begins
Source
Fixed address from fixed address
8 bits
16 bits
Fixed address from an arbitrary 1 M bytes space
Arbitrary 1 M bytes space from a fixed address
Destination
01
16
Destination
Dummy
cycle
Dummy
cycle
00
CPU use
16
CPU use
Set-up
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Source
Source
Destination
(3) Underflow
Destination
Dummy
cycle
Cleared to “0” when interrupt request is
accepted, or cleared by software
Dummy
cycle
M16C / 62A Group
Mitsubishi microcomputers
FF
16
CPU use
CPU use