MC9S12E256MFUE Freescale Semiconductor, MC9S12E256MFUE Datasheet - Page 251

IC MCU 256K FLASH 25MHZ 80-QFP

MC9S12E256MFUE

Manufacturer Part Number
MC9S12E256MFUE
Description
IC MCU 256K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E256MFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
60
Number Of Timers
12
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
Controller Family/series
HCS12/S12X
No. Of I/o's
60
Ram Memory Size
16KB
Cpu Speed
25MHz
No. Of Timers
3
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12E256MFUE
Manufacturer:
FREESCAL
Quantity:
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Part Number:
MC9S12E256MFUE
Manufacturer:
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Quantity:
10 000
8.3.2.3
Read: anytime
Write: anytime
Freescale Semiconductor
Reset
Field
RWU
TCIE
SBK
ILIE
TIE
RIE
TE
RE
7
6
5
4
3
2
1
0
W
R
TIE
Transmitter Interrupt Enable Bit —TIE enables the transmit data register empty flag, TDRE, to generate
interrupt requests.
0 TDRE interrupt requests disabled
1 TDRE interrupt requests enabled
Transmission Complete Interrupt Enable Bit — TCIE enables the transmission complete flag, TC, to generate
interrupt requests.
0 TC interrupt requests disabled
1 TC interrupt requests enabled
Receiver Full Interrupt Enable Bit — RIE enables the receive data register full flag, RDRF, or the overrun flag,
OR, to generate interrupt requests.
0 RDRF and OR interrupt requests disabled
1 RDRF and OR interrupt requests enabled
Idle Line Interrupt Enable Bit — ILIE enables the idle line flag, IDLE, to generate interrupt requests.
0 IDLE interrupt requests disabled
1 IDLE interrupt requests enabled
Transmitter Enable Bit — TE enables the SCI transmitter and configures the TXD pin as being controlled by the
SCI. The TE bit can be used to queue an idle preamble.
0 Transmitter disabled
1 Transmitter enabled
Receiver Enable Bit — RE enables the SCI receiver.
0 Receiver disabled
1 Receiver enabled
Receiver Wakeup Bit — Standby state
0 Normal operation.
1 RWU enables the wakeup function and inhibits further receiver interrupt requests. Normally, hardware wakes
Send Break Bit — Toggling SBK sends one break character (10 or 11 logic 0s, respectively 13 or 14 logics 0s
if BRK13 is set). Toggling implies clearing the SBK bit before the break character has finished transmitting. As
long as SBK is set, the transmitter continues to send complete break characters (10 or 11 bits, respectively 13
or 14 bits).
0 No break characters
1 Transmit break characters
SCI Control Register 2 (SCICR2)
0
7
the receiver by automatically clearing RWU.
TCIE
0
6
Figure 8-6. SCI Control Register 2 (SCICR2)
Table 8-6. SCICR2 Field Descriptions
RIE
MC9S12E256 Data Sheet, Rev. 1.08
0
5
ILIE
0
4
Description
TE
3
0
Chapter 8 Serial Communication Interface (SCIV4)
RE
0
2
RWU
0
1
SBK
0
0
251

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