MC9S12E256MFUE Freescale Semiconductor, MC9S12E256MFUE Datasheet - Page 350

• Manufacturer Part Number: MC9S12E256MFUE
• Description: IC MCU 256K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E256MFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-QFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 12
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 60
• Ram Memory Size: 16KB
• Cpu Speed: 25MHz
• No. Of Timers: 3
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
350
PWMRFC
PRSCC
Field
2
0
LDFQC
0000
0001
0010
0011
0100
0101
0110
0111
Prescaler C — This buffered field selects the PWM clock frequency illustrated in
Note: Reading the PRSCC field reads the buffered value and not necessarily the value currently in effect. The
PWM Reload Flag C — This flag is set at the beginning of every reload cycle regardless of the state of the
LDOKC bit. Clear PWMRFC by reading PMFFQCC with PWMRFC set and then writing a logic one to the
PWMRFC bit. If another reload occurs before the clearing sequence is complete, writing logic one to PWMRFC
has no effect.
0 No new reload cycle since last PWMRFC clearing
1 New reload cycle since last PWMRFC clearing
Note: Clearing PWMRFC satisfies pending PWMRFC CPU interrupt requests.
PRSCC field takes effect at the beginning of the next PWM cycle and only when the load okay bit, LDOKC,
is set.
Every 2 PWM opportunities
Every 3 PWM opportunities
Every 4 PWM opportunities
Every 5 PWM opportunities
Every 6 PWM opportunities
Every 7 PWM opportunities
Every 8 PWM opportunities
Table 11-40. PMFFQCC Field Descriptions (continued)
PWM Reload Frequency
Every PWM opportunity
PRSCC
Table 11-41. PWM Reload Frequency C
00
01
10
11
MC9S12E256 Data Sheet, Rev. 1.08
Table 11-42. PWM Prescaler C
Description
PWM Clock Frequency
LDFQ[3:0]
1000
1001
1010
1011
1100
1101
1110
1111
f
f
f
bus
bus
bus
f
bus
/2
/4
/8
Every 10 PWM opportunities
Every 11 PWM opportunities
Every 12 PWM opportunities
Every 13 PWM opportunities
Every 14 PWM opportunities
Every 15 PWM opportunities
Every 16 PWM opportunities
Every 9 PWM opportunities
PWM Reload Frequency
Table
Freescale Semiconductor
11-42.