MC9S12E256MFUE Freescale Semiconductor, MC9S12E256MFUE Datasheet - Page 268

IC MCU 256K FLASH 25MHZ 80-QFP

MC9S12E256MFUE

Manufacturer Part Number
MC9S12E256MFUE
Description
IC MCU 256K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E256MFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
60
Number Of Timers
12
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
Controller Family/series
HCS12/S12X
No. Of I/o's
60
Ram Memory Size
16KB
Cpu Speed
25MHz
No. Of Timers
3
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12E256MFUE
Manufacturer:
FREESCAL
Quantity:
329
Part Number:
MC9S12E256MFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 8 Serial Communication Interface (SCIV4)
Figure 8-20
after the reset is low but is not preceded by three high samples that would qualify as a falling edge.
Depending on the timing of the start bit search and on the data, the frame may be missed entirely or it may
set the framing error flag.
In
noise flag but does not reset the RT clock. In start bits only, the RT8, RT9, and RT10 data samples are
ignored.
8.4.5.4
If the data recovery logic does not detect a logic 1 where the stop bit should be in an incoming frame, it
sets the framing error flag, FE, in SCI status register 1 (SCISR1). A break character also sets the FE flag
because a break character has no stop bit. The FE flag is set at the same time that the RDRF flag is set.
268
RT CLOCK COUNT
RT CLOCK COUNT
RESET RT CLOCK
RESET RT CLOCK
Figure
RT CLOCK
RT CLOCK
SAMPLES
SAMPLES
8-21, a noise burst makes the majority of data samples RT8, RT9, and RT10 high. This sets the
shows a burst of noise near the beginning of the start bit that resets the RT clock. The sample
RXD
RXD
Framing Errors
1
1
1
1
1
1
1
1
1
1
Figure 8-20. Start Bit Search Example 5
Figure 8-21. Start Bit Search Example 6
1
1
MC9S12E256 Data Sheet, Rev. 1.08
1
1
1
1
1
1
0
0
0
0
1
0
START BIT
START BIT
1
0
0
1
NO START BIT FOUND
0
0
0
1
0
0
0
Freescale Semiconductor
0
0
LSB
LSB

Related parts for MC9S12E256MFUE