MC9S12E256MFUE Freescale Semiconductor, MC9S12E256MFUE Datasheet - Page 348

• Manufacturer Part Number: MC9S12E256MFUE
• Description: IC MCU 256K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E256MFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-QFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 12
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 60
• Ram Memory Size: 16KB
• Cpu Speed: 25MHz
• No. Of Timers: 3
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
11.3.2.29 PMF Deadtime B Register (PMFDTMB)
Read anytime and write only if MTG is set. This register cannot be modified after the WP bit is set.
11.3.2.30 PMF Enable Control C Register (PMFENCC)
Read anytime and write only if MTG is set.
348
Module Base + 0x002E
Module Base + 0x0030
PMFDTMB
PWMENC
Reset
Reset
Field
Field
11–0
7
W
W
R
R
PWMENC
15
0
0
PMF Deadtime B — The 12-bit value written to this register is the number of PWM clock cycles in
complementary channel operation. A reset sets the PWM deadtime register to a default value of 0x0FFF,
selecting a deadtime of 256-PWM clock cycles minus one bus clock cycle.
Note: Deadtime is affected by changes to the prescaler value. The deadtime duration is determined as follows:
PWM Generator C Enable — If MTG is clear, this bit reads zero and cannot be written.
If MTG is set, this bit when set enables the PWM generator C and the PWM4 and PWM5 pins. When PWMENC
is clear, PWM generator C is disabled, and the PWM4 and PWM5 pins are in their inactive states unless the
OUTCTL4 and OUTCTL5 bits are set.
0 PWM generator C and PWM4–5 pins disabled unless the respective OUTCTL bit is set.
1 PWM generator C and PWM4–5 pins enabled.
0
7
= Unimplemented or Reserved
14
0
0
DT = P
value of dead time. For example: if the prescaler is programmed for a divide-by-two and the PMFDTMB is
set to five, then P = 2 and the deadtime value is equal to DT = 2
case exists when the P = 1, then DT = PMFDTMB.
= Unimplemented or Reserved
13
0
0
Figure 11-36. PMF Enable Control C Register (PMFENCC)
PMFDTMB – 1, where DT is deadtime, P is the prescaler value, PMFDTMB is the programmed
0
0
6
Figure 11-35. PMF Deadtime B Register (PMFDTMB)
12
0
0
Table 11-38. PMFDTMB Field Descriptions
Table 11-39. PMFENCC Field Descriptions
11
1
MC9S12E256 Data Sheet, Rev. 1.08
0
0
5
10
1
1
9
0
0
4
1
8
Description
Description
1
7
3
0
0
PMFDTMB
1
6
1
5
5 – 1 = 9 IPbus clock cycles. A special
0
0
2
4
1
1
3
LDOKC
Freescale Semiconductor
0
1
1
2
PWMRIEC
1
1
0
0
1
0