DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 493
DF2134AFA20V
Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2134AFA20V.pdf
(1063 pages)
Specifications of DF2134AFA20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Figure 15.13 shows an example of SCI operation for multiprocessor format reception.
MPIE
RDRF
RDR
value
MPIE
RDRF
RDR
value
1
1
Start
bit
Start
bit
0
0
MPIE = 0
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)
MPIE = 0
D0
D0
Figure 15.13 Example of SCI Operation in Reception
ID1
D1
D1
RXI interrupt
request
(multiprocessor
interrupt)
generated
Data (ID1)
Data (ID2)
RXI interrupt
request
(multiprocessor
interrupt)
generated
D7
D7
(b) Data matches station’s ID
MPB
MPB
(a) Data does not match station’s ID
1
1
RDR data read
and RDRF flag
cleared to 0 in
RXI interrupt
handling routine
RDR data read and
RDRF flag cleared
to 0 in RXI interrupt
handling routine
Section 15 Serial Communication Interface (SCI, IrDA)
Stop
bit
Stop
bit
1
1
Start
bit
Start
bit
0
0
Rev. 4.00 Jun 06, 2006 page 437 of 1004
D0
D0
If not this station’s ID,
MPIE bit is set to 1
again
Matches this station’s ID,
so reception continues, and
data is received in RXI
interrupt handling routine
D1
D1
Data (Data2)
Data (Data1)
ID1
ID2
D7
D7
MPB
MPB
RXI interrupt request is
not generated, and RDR
retains its state
0
0
REJ09B0301-0400
Stop
bit
Stop
bit
MPIE bit set to 1
again
1
1
Idle state
(mark state)
Idle state
(mark state)
1
1
Data2
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