MC9S12HZ128CAL Freescale Semiconductor, MC9S12HZ128CAL Datasheet - Page 247

• Manufacturer Part Number: MC9S12HZ128CAL
• Description: IC MCU 16BIT 128K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12HZ128CAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12H
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

These bits enable the frontplane output waveform on the corresponding frontplane pin when LCDEN = 1.
Read: anytime
Write: anytime
8.3.2.4
The LCD RAM consists of 16 bytes. After reset the LCD RAM contents will be indeterminate (I), as
indicated by
Freescale Semiconductor
I = Value is indeterminate
FP[31:0]EN
LCDRAM
LCDRAM
LCDRAM
LCDRAM
LCDRAM
LCDRAM
Reset
Field
31:0
W
R
FP31EN
Reset
Reset
Reset
Reset
Reset
Reset
Frontplane Output Enable — The FP[31:0]EN bit enables the frontplane driver outputs. If LCDEN = 0, these
bits have no effect on the state of the I/O pins. It is recommended to set FP[31:0]EN bits before LCDEN is set.
0 Frontplane driver output disabled on FP[31:0].
1 Frontplane driver output enabled on FP[31:0].
Figure
LCD RAM (LCDRAM)
7
0
W
W
W
W
W
W
R
R
R
R
R
R
FP11BP3
FP1BP3
FP3BP3
FP5BP3
FP7BP3
FP9BP3
8-8.
7
FP30EN
I
I
I
I
I
I
Figure 8-7. LCD Frontplane Enable Register 3 (FPENR3)
6
0
Table 8-5. FPENR0–FPENR3 Field Descriptions
FP11BP2
FP1BP2
FP3BP2
FP5BP2
FP7BP2
FP9BP2
6
I
I
I
I
I
I
FP29EN
MC9S12HZ256 Data Sheet, Rev. 2.05
Figure 8-8. LCD RAM (LCDRAM)
5
0
FP11BP1
FP1BP1
FP3BP1
FP5BP1
FP7BP1
FP9BP1
5
I
I
I
I
I
I
FP28EN
4
0
FP11BP0
FP1BP0
FP3BP0
FP5BP0
FP7BP0
FP9BP0
Description
4
I
I
I
I
I
I
FP27EN
3
0
FP10BP3
FP0BP3
FP2BP3
FP4BP3
FP6BP3
FP8BP3
3
I
I
I
I
I
I
Chapter 8 Liquid Crystal Display (LCD32F4BV1)
FP26EN
FP10BP2
2
0
FP0BP2
FP2BP2
FP4BP2
FP6BP2
FP8BP2
2
I
I
I
I
I
I
FP25EN
FP10BP1
FP0BP1
FP2BP1
FP4BP1
FP6BP1
FP8BP1
1
0
1
I
I
I
I
I
I
FP24EN
FP10BP0
FP0BP0
FP2BP0
FP4BP0
FP6BP0
FP8BP0
0
0
0
I
I
I
I
I
I
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