ADUC7128BSTZ126-RL Analog Devices Inc, ADUC7128BSTZ126-RL Datasheet - Page 46

IC DAS MCU ARM7 ADC/DDS 64-LQFP

ADUC7128BSTZ126-RL

Manufacturer Part Number
ADUC7128BSTZ126-RL
Description
IC DAS MCU ARM7 ADC/DDS 64-LQFP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7128BSTZ126-RL

Core Size
16/32-Bit
Program Memory Size
126KB (126K x 8)
Core Processor
ARM7
Speed
41.78MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
PLA, POR, PWM, PSM, Temp Sensor, WDT
Number Of I /o
28
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x12b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-LQFP
Controller Family/series
(ARM7) ADUC
No. Of I/o's
40
Cpu Speed
41.78MHz
No. Of Timers
5
Digital Ic Case Style
LQFP
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADUC7128QSPZ - KIT DEV FOR ADUC7128
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
ADUC7128BSTZ126-RLTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC7128BSTZ126-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADuC7128/ADuC7129
DACEN Register
Name
DACEN
Table 50. DACEN MMR Bit Designations
Bit
7:1
0
DACDAT Register
Name
DACDAT
Table 51. DACDAT MMR Bit Designations
Bit
15:10
9:0
Table 53. DDSCON MMR Bit Designations
Bit
7:6
5
4
3:0
Address
0xFFFF06B8
Description
Reserved.
Set to 1 by the user to enable DAC mode.
Set to 0 by the user to enable DDS mode.
Description
Reserved.
DDS Output Enable.
Reserved.
Binary Divide Control.
DIV
0000
0001
0010
0011
0100
0101
0110
0111
1xxx
Address
0xFFFF06B4
Description
Reserved.
10-bit data for DAC.
Set by user to enable the DDS output. This has an effect only if the DDS is selected in DACCON.
Cleared by user to disable the DDS output.
Default Value
0x00
Default Value
0x0000
Scale Ratio
0.000
0.125
0.250
0.375
0.500
0.625
0.750
0.875
1.000
Access
R/W
Access
R/W
Rev. 0 | Page 46 of 92
The DACDAT MMR controls the output of the DAC. The data
written to this register is a ±9-bit signed value. This means that
0x0000 represents midscale, 0x0200 represents zero scale, and
0x01FF represents full scale.
DACEN and DACDAT require key access. To write to these
MMRs, use the sequences shown in Table 52.
Table 52. DACEN and DACDAT Write Sequences
DACEN
DACKEY0 = 0x07
DACEN = user value
DACKEY1 = 0xB9
DDS
The DDS is used to generate a digital sine wave signal for the
DAC on the ADuC7128/ADuC7129. It can be enabled into
a free running mode by the user.
Both the phase and frequency can be controlled.
DACDAT
DACKEY0 = 0x07
DACDAT = user value
DACKEY1 = 0xB9

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