PIC17C44-16/P Microchip Technology, PIC17C44-16/P Datasheet - Page 125

• Manufacturer Part Number: PIC17C44-16/P
• Description: IC MCU OTP 8KX16 PWM 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C44-16/P

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 16MHz
• Connectivity: UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: OTP
• Ram Size: 454 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC17
• No. Of I/o's: 33
• Ram Memory Size: 454Byte
• Cpu Speed: 16MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC17
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 33
• Interface Type: SCI/USART
• Number Of Timers: 4
• Embedded Interface Type: USART
• Rohs Compliant: Yes
• Processor Series: PIC17C
• Core: PIC
• Data Ram Size: 454 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• Data Rom Size: 454 B
• Height: 4.95 mm
• Length: 53.21 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Width: 14.73 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA17XP401 - DEVICE ADAPTER FOR PIC17C42AAC174001 - MODULE SKT PROMATEII 40DIP
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
1996 Microchip Technology Inc.
Before Instruction
After Instruction
Decode
RESULT =
WREG
RESULT =
WREG
Q1
=
=
register 'f'
Inclusive OR WREG with f
[ label ]
0
d
(WREG) .OR. (f)
Inclusive OR WREG with register 'f'. If
'd' is 0 the result is placed in WREG. If
'd' is 1 the result is placed back in regis-
ter 'f'.
1
1
IORWF
Z
Read
0000
Q2
0x13
0x91
0x13
0x93
f
[0,1]
255
RESULT, 0
IORWF
100d
Execute
Q3
f,d
ffff
(dest)
destination
Write to
Q4
ffff
LCALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Forced NOP
Decode
SUBROUTINE =
PC
PC
Q1
Long Call
[ label ]
0
PC + 1
k
None
LCALL allows an unconditional subrou-
tine call to anywhere within the 64k pro-
gram memory space.
First, the return address (PC + 1) is
pushed onto the stack. A 16-bit desti-
nation address is then loaded into the
program counter. The lower 8-bits of
the destination address is embedded in
the instruction. The upper 8-bits of PC
is loaded from PC high holding latch,
PCLATH.
1
2
MOVLW
MOVPF
LCALL
literal 'k'
Read
NOP
1011
Q2
=
=
k
PCL, (PCLATH)
255
16-bit Address
?
Address (SUBROUTINE)
HIGH(SUBROUTINE)
WREG, PCLATH
LOW(SUBROUTINE)
PIC17C4X
LCALL
TOS;
0111
Execute
Execute
Q3
DS30412C-page 125
k
kkkk
register PCL
PCH
Write
NOP
Q4
kkkk