PIC17C44-16/P Microchip Technology, PIC17C44-16/P Datasheet - Page 137

IC MCU OTP 8KX16 PWM 40DIP

PIC17C44-16/P

Manufacturer Part Number
PIC17C44-16/P
Description
IC MCU OTP 8KX16 PWM 40DIP
Manufacturer
Microchip Technology
Series
PIC® 17Cr

Specifications of PIC17C44-16/P

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
16MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Type
OTP
Ram Size
454 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC17
No. Of I/o's
33
Ram Memory Size
454Byte
Cpu Speed
16MHz
No. Of Timers
4
No. Of Pwm Channels
2
Package
40PDIP
Device Core
PIC
Family Name
PIC17
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
33
Interface Type
SCI/USART
Number Of Timers
4
Embedded Interface Type
USART
Rohs Compliant
Yes
Processor Series
PIC17C
Core
PIC
Data Ram Size
454 B
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Data Rom Size
454 B
Height
4.95 mm
Length
53.21 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Width
14.73 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA17XP401 - DEVICE ADAPTER FOR PIC17C42AAC174001 - MODULE SKT PROMATEII 40DIP
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
1996 Microchip Technology Inc.
Before Instruction
After Instruction
Decode
REG
REG
Q1
=
=
register 'f'
Swap f
[ label ] SWAPF f,d
0
d
f<3:0>
f<7:4>
The upper and lower nibbles of register
'f' are exchanged. If 'd' is 0 the result is
placed in WREG. If 'd' is 1 the result is
placed in register 'f'.
1
1
SWAPF
None
Read
0001
Q2
0x53
0x35
f
[0,1]
255
REG,
dest<7:4>;
dest<3:0>
110d
Execute
Q3
0
ffff
destination
Write to
Q4
ffff
TABLRD
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Decode
Q1
TBLATH or
Table Read
[ label ] TABLRD t,i,f
0
i
t
If t = 1,
If t = 0,
If i = 1,
None
1.
2.
3.
1
2 (3 cycle if f = PCL)
TBLATL
register
Read
1010
Q2
TBLATH
TBLATL
Prog Mem (TBLPTR)
TBLPTR + 1
[0,1]
[0,1]
f
A byte of the table latch (TBLAT)
is moved to register file 'f'.
If t = 0: the high byte is moved;
If t = 1: the low byte is moved
Then the contents of the program
memory location pointed to by
the
(TBLPTR) is loaded into the
16-bit Table Latch (TBLAT).
If i = 1: TBLPTR is incremented;
If i = 0: TBLPTR is not
255
PIC17C4X
16-bit
10ti
incremented
Execute
f;
f;
Q3
DS30412C-page 137
TBLPTR
Table
ffff
register 'f'
Write
Pointer
TBLAT;
Q4
ffff

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