PIC17C44-16/P Microchip Technology, PIC17C44-16/P Datasheet - Page 127

• Manufacturer Part Number: PIC17C44-16/P
• Description: IC MCU OTP 8KX16 PWM 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C44-16/P

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 16MHz
• Connectivity: UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: OTP
• Ram Size: 454 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC17
• No. Of I/o's: 33
• Ram Memory Size: 454Byte
• Cpu Speed: 16MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC17
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 33
• Interface Type: SCI/USART
• Number Of Timers: 4
• Embedded Interface Type: USART
• Rohs Compliant: Yes
• Processor Series: PIC17C
• Core: PIC
• Data Ram Size: 454 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• Data Rom Size: 454 B
• Height: 4.95 mm
• Length: 53.21 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Width: 14.73 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA17XP401 - DEVICE ADAPTER FOR PIC17C42AAC174001 - MODULE SKT PROMATEII 40DIP
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Q Cycle Activity:
MOVLR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
1996 Microchip Technology Inc.
Note:
Before Instruction
After Instruction
Decode
BSR register
BSR register
Q1
This instruction is not available in the
PIC17C42 device.
Read literal
Move Literal to high nibble in
BSR
[ label ]
0
k
The 4-bit literal 'k' is loaded into the
most significant 4-bits of the Bank
Select Register (BSR). Only the high
4-bits of the Bank Select Register
are affected. The lower half of the
BSR is unchanged. The assembler
will encode the “u” fields as 0.
1
1
MOVLR
None
'k:u'
1011
Q2
=
=
k
(BSR<7:4>)
15
0x22
0x52
5
MOVLR k
101x
Execute
Q3
kkkk
literal 'k' to
BSR<7:4>
Write
Q4
uuuu
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
After Instruction
Decode
WREG
Q1
=
Move Literal to WREG
[ label ]
0
k
None
The eight bit literal 'k' is loaded into
WREG.
1
1
MOVLW
literal 'k'
Read
1011
Q2
0x5A
k
(WREG)
255
PIC17C4X
MOVLW k
0000
0x5A
Execute
Q3
DS30412C-page 127
kkkk
Write to
WREG
Q4
kkkk