PIC17C44-16/P Microchip Technology, PIC17C44-16/P Datasheet - Page 84

IC MCU OTP 8KX16 PWM 40DIP

PIC17C44-16/P

Manufacturer Part Number
PIC17C44-16/P
Description
IC MCU OTP 8KX16 PWM 40DIP
Manufacturer
Microchip Technology
Series
PIC® 17Cr

Specifications of PIC17C44-16/P

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
16MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Type
OTP
Ram Size
454 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC17
No. Of I/o's
33
Ram Memory Size
454Byte
Cpu Speed
16MHz
No. Of Timers
4
No. Of Pwm Channels
2
Package
40PDIP
Device Core
PIC
Family Name
PIC17
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
33
Interface Type
SCI/USART
Number Of Timers
4
Embedded Interface Type
USART
Rohs Compliant
Yes
Processor Series
PIC17C
Core
PIC
Data Ram Size
454 B
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Data Rom Size
454 B
Height
4.95 mm
Length
53.21 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Width
14.73 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA17XP401 - DEVICE ADAPTER FOR PIC17C42AAC174001 - MODULE SKT PROMATEII 40DIP
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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PIC17C4X
FIGURE 13-2: RCSTA REGISTER (ADDRESS: 13h, BANK 0)
DS30412C-page 84
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
R/W - 0 R/W - 0 R/W - 0 R/W - 0
SPEN
SPEN : Serial Port Enable bit
1 = Configures RA5/RX/DT and RA4/TX/CK pins as serial port pins
0 = Serial port disabled
RX9 : 9-bit Receive Enable bit
1 = Selects 9-bit reception
0 = Selects 8-bit reception
SREN : Single Receive Enable bit
This bit enables the reception of a single byte. After receiving the byte, this bit is automatically cleared.
Synchronous mode:
1 = Enable reception
0 = Disable reception
Note: This bit is ignored in synchronous slave reception.
Asynchronous mode:
Don’t care
CREN : Continuous Receive Enable bit
This bit enables the continuous reception of serial data.
Asynchronous mode:
1 = Enable reception
0 = Disables reception
Synchronous mode:
1 = Enables continuous reception until CREN is cleared (CREN overrides SREN)
0 = Disables continuous reception
Unimplemented : Read as '0'
FERR : Framing Error bit
1 = Framing error (Updated by reading RCREG)
0 = No framing error
OERR : Overrun Error bit
1 = Overrun (Cleared by clearing CREN)
0 = No overrun error
RX9D : 9th bit of receive data (can be the software calculated parity bit)
RX9
SREN
CREN
U - 0
FERR
R - 0
OERR
R - 0
RX9D
R - x
bit 0
R = Readable bit
W = Writable bit
-n = Value at POR reset
(x = unknown)
1996 Microchip Technology Inc.

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