R5F212A8SNFP#U0 Renesas Electronics America, R5F212A8SNFP#U0 Datasheet - Page 454

• Manufacturer Part Number: R5F212A8SNFP#U0
• Description: IC R8C/2A MCU FLASH 64LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Ar

Specifications of R5F212A8SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2A Group, R8C/2B Group
Rev.2.00
REJ09B0324-0200
Figure 16.31
Slave Address Register
IIC bus Transmit Data Register
b7 b6
b7 b6 b5 b4 b3 b2 b1
b5
Nov 26, 2007
b4
b3 b2
Registers SAR and ICDRT
b1
b0
b0
Store transmit data
When it is detected that the ICDRS register is empty, the stored transmit data item is
transferred to the ICDRS register and data transmission starts.
When the next transmit data item is w ritten to the ICDRT register during transmission of the
data in the ICDRS register, continuous transmit is enabled. When the MLS bit in the ICMR
register is set to 1 (data transferred LSB-first) and after the data is w ritten to the ICDRT
register, the MSB-LSB inverted data is read.
Bit Symbol
Symbol
Symbol
SVA0
SVA1
SVA2
SVA3
SVA4
SVA5
SVA6
ICDRT
SAR
Page 432 of 580
FS
Format select bit
Slave address 6 to 0
Address
Bit Name
00BDh
Address
00BEh
Function
0 : I
1 : Clock synchronous serial format
Set an address different from that of the other
slave devices w hich are connected to the I
bus. When the 7 high-order bits of the first frame
transmitted after the starting condition match bits
SVA0 to SVA6 in slave mode of the I
format, the MCU operates as a slave device.
2
C bus format
16. Clock Synchronous Serial Interface
After Reset
Function
After Reset
00h
FFh
2
C bus
2
C
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW