R5F212A8SNFP#U0 Renesas Electronics America, R5F212A8SNFP#U0 Datasheet - Page 490

• Manufacturer Part Number: R5F212A8SNFP#U0
• Description: IC R8C/2A MCU FLASH 64LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Ar

Specifications of R5F212A8SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2A Group, R8C/2B Group
Rev.2.00
REJ09B0324-0200
Figure 17.11
17.4.3
IR bit in the TRAIC
The bus collision detection function can be used when UART0 is enabled for transmission (TE bit in the U0C1
register = 1). To detect a bus collision during Synch Break transmission, set the BCE bit in the LINCR2 register
to 1 (bus collision detection enabled).
Figure 17.11 shows typical operation of the hardware LIN when a bus collision is detected.
TE bit in the U0C1
BCDCT flag in the
LINCR register
LINST register
Nov 26, 2007
Transfer clock
LINE bit in the
Bus Collision Detection Function
RXD0 pin
TXD0 pin
register
register
Typical Operation when a Bus Collision is Detected
1
0
1
0
1
0
1
0
1
0
1
0
1
0
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Set to 1 by a program
Set to 1 by a program
Cleared to 0 upon
acceptance of interrupt
request or by a program
Set by writing 1 to
the B2CLR bit in the
LINST register
17. Hardware LIN