C8051F34A-GM Silicon Laboratories Inc, C8051F34A-GM Datasheet - Page 152

IC 8051 MCU 64K FLASH MEM 32-QFN

C8051F34A-GM

Manufacturer Part Number
C8051F34A-GM
Description
IC 8051 MCU 64K FLASH MEM 32-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F34xr
Datasheet

Specifications of C8051F34A-GM

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
32-QFN
Core Processor
8051
Core Size
8-Bit
Speed
48MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4352 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F340DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
32QFN EP
Device Core
8051
Family Name
C8051F34x
Maximum Speed
48 MHz
Cpu Family
C8051F34x
Device Core Size
8b
Frequency (max)
48MHz
Total Internal Ram Size
4.25KB
# I/os (max)
25
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
QFN EP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1748 - ADAPTER TOOLSTICK FOR C8051F34X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1350-5
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
152
Bits7–0: P1.[7:0]
Bits7–0: Analog Input Configuration Bits for P1.7–P1.0 (respectively).
Bits7–0: Output Configuration Bits for P1.7–P1.0 (respectively): ignored if corresponding bit in regis-
P1.7
R/W
R/W
R/W
Bit7
Bit7
Bit7
Write - Output appears on I/O pins per Crossbar Registers (when XBARE = ‘1’).
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P1MDOUT.n bit = 0).
Read - Always reads ‘0’ if selected as analog input in register P1MDIN. Directly reads Port
pin when configured as digital input.
0: P1.n pin is logic low.
1: P1.n pin is logic high.
Port pins configured as analog inputs have their weak pull-up, digital driver, and digital
receiver disabled.
0: Corresponding P1.n pin is configured as an analog input.
1: Corresponding P1.n pin is not configured as an analog input.
ter P1MDIN is logic 0.
0: Corresponding P1.n Output is open-drain.
1: Corresponding P1.n Output is push-pull.
P1.6
R/W
R/W
R/W
Bit6
Bit6
Bit6
SFR Definition 15.10. P1MDOUT: Port1 Output Mode
SFR Definition 15.9. P1MDIN: Port1 Input Mode
P1.5
R/W
R/W
R/W
Bit5
Bit5
Bit5
SFR Definition 15.8. P1: Port1 Latch
P1.4
R/W
R/W
R/W
Bit4
Bit4
Bit4
Rev. 1.3
P1.3
R/W
R/W
R/W
Bit3
Bit3
Bit3
P1.2
R/W
R/W
R/W
Bit2
Bit2
Bit2
P1.1
R/W
R/W
R/W
Bit1
Bit1
Bit1
(bit addressable)
P1.0
R/W
R/W
R/W
Bit0
Bit0
Bit0
SFR Address:
SFR Address:
SFR Address:
00000000
Reset Value
Reset Value
Reset Value
11111111
11111111
0x90
0xF2
0xA5

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